Agilent Technologies N8900 series Operating Manual page 88

Autoranging system dc power supply
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*CLS does not clear the enable register, but does clear the
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STATus:OPERation:NTRansition < value >
STATus:OPERation:NTRansition?
STATus:OPERation:PTRansition < value >
STATus:OPERation:PTRansition?
Sets and queries the value of the
serve as a polarity filter between the Operation Condition and Operation Event registers.
When a bit in the NTR register is set to 1, then a 1-to-0 transition of the corresponding bit in the Operation Condition
register causes that bit in the Operation Event register to be set.
When a bit in the PTR register is set to 1, then a 0-to-1 transition of the corresponding bit in the Operation Condition
register causes that bit in the Operation Event register to be set.
STATus:PRESet sets all bits in the PTR registers and clears all bits in the NTR registers.
Parameter
A decimal value that corresponds to the binary-
weighted sum of the bits in the register.
Enable bit 3 and 4 in the NTR register: STAT:OPER:NTR 24
Enable bit 3 and 4 in the PTR register: STAT:OPER:PTR 24
If the same bits in both NTR and PTR registers are set to 1, then any transition of that bit at the Operation Condi-
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tion register sets the corresponding bit in the Operation Event register.
If the same bits in both NTR and PTR registers are set to 0, then no transition of that bit at the Operation Condition
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register can set the corresponding bit in the Operation Event register .
The value returned is the binary-weighted sum of all bits set in the register.
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STATus:PRESet
Presets all Enable, PTR, and NTR registers.
Operation register
STAT:OPER:ENAB
STAT:OPER:NTR
STAT:OPER:PTR
Parameter
(none)
Preset the Operation and Questionable registers: STAT:PRES
Agilent N8900 Series Operating and Service Guide
NTR
(Negative-Transition) and
Questionable register
STAT:QUES:ENAB
STAT:QUES:NTR
STAT:QUES:PTR
(none)
event
register.
PTR
(Positive-Transition) registers. These registers
Typical Return
<bit value>
Preset setting
all defined bits are disabled
all defined bits are disabled
all defined bits are enabled
Typical Return
STATus Commands
87

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