Design and Environmental Specifications
10.4.4
Voltage Regulation
The power supply output voltages must stay within the following voltage limits when operating at
steady state and dynamic loading conditions. These limits include the peak-peak ripple/noise.
All outputs are measured with reference to the return remote sense signal (ReturnS).
Parameter
+ 3.3 V
+ 5 V
+ 12 V
- 12 V
+ 5 VSB
10.4.5
Dynamic Loading
The output voltages remain within limits for the step loading and capacitive loading specified in
the following table. The load transient repetition rate is tested between 50 Hz and 5 kHz at duty
cycles ranging from 10%-90%. The load transient repetition rate is only a test specification. The
step load may occur anywhere within the Min load to the Max load conditions.
Output
+3.3 V
+5 V
12 V
+5 VSB
Notes:
1.
Step loads on each 12 V output may happen simultaneously and should be tested that way.
10.4.6
Capacitive Loading
The power supply is stable and meets all requirements with the following capacitive loading
ranges.
10.4.7
Closed-loop Stability
The power supply is unconditionally stable under all line/load/transient load conditions including
capacitive load ranges. A minimum of 45° phase margin and -10 dB-gain margin is required.
The power supply manufacturer provides proof of the unit's closed-loop stability with local
100
Table 65. Voltage Regulation Limits
Tolerance
- 5%/+5%
- 5%/+5%
- 5%/+5%
- 10%/+10%
- 5%/+5%
Table 66. Transient Load Requirements
Step Load Size
(See note 1)
5.0 A
6.0 A
11.0 A
0.5 A
Table 67. Capacitve Loading Conditions
Output
Minimum
+3.3 V
100
+5 V
400
+12 V
500
-12 V
1
+5 VSB
20
Intel order number E65697-010
Minimum
Normal
+3.14
+3.30
+4.75
+5.00
+11.40
+12.00
-13.20
-12.00
+4.75
+5.00
Load Slew Rate
0.25 A/sec
0.25 A/sec
0.25 A/sec
0.25 A/sec
Maximum
2200
2200
2200
350
350
Intel® Server Board S3420GP TPS
Maximum
Units
+3.46
Vrms
+5.25
Vrms
+12.60
Vrms
-10.80
Vrms
+5.25
Vrms
Test capacitive Load
250 F
400 F
500 F
20 F
Units
F
F
F
F
F
Revision 2.4
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