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13.3 PWM OUTPUT UNIT OPERATION
13.3.1 Basic PWM Output Operation
The PWM pulse output duty is determined by the value set in bits 4 to 15 of the PWM modulo register (PWMn: n = 0,
1) as shown below.
PWM pulse output duty =
The PWM pulse output repetition frequency is the frequency obtained by division-by-256 of the PWM clock f
f
/4 set by the PWM prescaler register (PWPR) (= f
CLK
In PWM pulse output, 12-bit resolution is achieved by repeating output of a f
PWM signal 16 times.
The addition of extra pulses (1/f
cycle is controlled in accordance with the value of bits 4 to 7 of the PWMn to implement a PWM pulse signal once every
16 cycles.
PWM Signal
Note
8-bit resolution per PWM pulse cycle
CHAPTER 13 PWM OUTPUT UNIT
Note
(Value of PWMn bits 4 to 15)
4,096
Note 16 ≤ (Value of PWMn bits 4 to 15) ≤ 4,095
PWMC
) to the 8-bit resolution PWM pulses determined by bits 8 to 15 of the PWMn every
PWMC
Figure 13-4 Basic PWM Output Operation
Note
One 12-Bit PWM Signal Cycle
User's Manual U11316EJ4V1UD
+ 1
/256), and the minimum pulse width is 1/f
/256 repetition frequency 8-bit resolution
PWMC
/1 to
CLK
.
PWMC
381
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