Internal Data Area; Internal Ram Area - NEC uPD784038 Series User Manual

16-bit single-chip microcontrollers
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3.4 INTERNAL DATA AREA

The internal data area consists of the internal RAM area and special function register area (see Figures 3-1 to 3-5).
The final address of the internal data area can be specified by means of the LOCATION instruction as either 0FFFFH (when
a LOCATION 0H instruction is executed) or FFFFFH (when a LOCATION 0FH instruction is executed). Selection of the
addresses of the internal data area by means of the LOCATION instruction must be executed once immediately after reset
release, and once the selection is made, it cannot be changed. The program after reset release must be as shown in the example
below. If the internal data area and another area are allocated to the same addresses, the internal data area is accessed and
the other area cannot be accessed.
Example
Caution When the LOCATION 0H instruction is executed, it is necessary to ensure that the program after reset
release does not overlap the internal data area. It is also necessary to make sure that the entry addresses
of the service routines for non-maskable interrupts such as NMI do not overlap the internal data area.
Also, initialization must be performed for maskable interrupt entry areas, etc., before the internal data area
is referenced.

3.4.1 Internal RAM Area

The µ PD784038 incorporates general-purpose static RAM.
This area is configured as follows:
Peripheral RAM (PRAM)
Internal RAM area
Internal high-speed RAM (IRAM)
Internal RAM
Product Name
µ PD784031
µ PD784035
µ PD784036
µ PD784037
µ PD784038
µ PD78P4038
Remark The addresses in the table are the values that apply when the LOCATION 0H instruction is executed. When the
LOCATION 0FH instruction is executed, 0F0000H should be added to the values shown above.
80
CHAPTER 3 CPU ARCHITECTURE
RSTVCT
CSEG
AT 0
DW
RSTSTRT
to
INITSEG
CSEG
BASE
RSTSTRT: LOCATION 0H
MOVG
SP, #STKBGN
Table 3-2 Internal RAM Area
Internal RAM Area
2,048 bytes
(0F700H to 0FEFFH)
3,584 bytes
(0F100H to 0FEFFH)
4,352 bytes
(0EE00H to 0FEFFH)
User's Manual U11316EJ4V1UD
; or LOCATION 0FH
Peripheral RAM: PRAM
1,536 bytes
(0F700H to 0FCFFH)
3,072 bytes
(0F100H to 0FCFFH)
3,840 bytes
(0EE00H to 0FCFFH)
Internal High-Speed RAM: IRAM
512 bytes
(0FD00H to 0FEFFH)

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