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8.5 EXTERNAL EVENT COUNTER FUNCTION
The timer/counter 0 can count clock pulses input from the external interrupt request input pin (INTP3).
No special selection method is needed for the external event counter operating mode. When the timer register 0 (TM0) count
clock is specified as external clock input by the setting of the low-order 4 bits of prescaler mode register 0 (PRM0), TM0 operates
as an external event counter.
The maximum frequency of external clock pulses that can be counted by TM0 as the external event counter is 2.00 MHz (f
= 16 MHz) irrespective of whether only one edge or both edges are counted on INTP3 input.
The pulse width of the INTP3 input must be at least 4 system clocks (0.25 µ s: f
level. If the pulse width is shorter than this, the pulse may not be counted.
The timer/counter 0 external event counter timing is shown in Figure 8-10.
(1) Counting one edge (maximum frequency = f
4/f
(MIN.) 4/f
CLK
INTP3
ICI
TM0
Dn
Remark
ICI: INTP3 input signal after passing through edge detection circuit
202
CHAPTER 8 TIMER/COUNTER 0
Figure 8-10 Timer/Counter 0 External Event Count Timing (1/2)
/8)
CLK
(MIN.)
8/f
(MIN.)
CLK
CLK
Dn + 1
User's Manual U11316EJ4V1UD
= 16 MHz) for both the high level and low
CLK
3 to 4/f
CLK
Dn + 2
Dn + 3
CLK
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