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CHAPTER 17 ASYNCHRONOUS SERIAL INTERFACE/3-WIRE SERIAL I/O
17.3.7 Corrective Action in Case of Slippage of Serial Clock and Shift Operations
When an external clock is selected as the serial clock, there may be slippage between the number of serial clocks and
shift operations due to noise, etc. In this case, since the serial clock counter is initialized by disabling both transmit operations
and receive operations (by clearing (to 0) the CTXEn bit and CRXEn bit), synchronization of the shift operations and the
serial clock can be restored by using the first serial clock input after reception or transmission is next enabled as the first
clock.
Remark n = 1 or 2
17.4 BAUD RATE GENERATOR
The baud rate generator is the circuit that generates the UART/IOE serial clock. Two independent circuits are
incorporated, one for each serial interface.
17.4.1 Baud Rate Generator Configuration
The baud rate generator block diagram is shown in Figure 17-14.
User's Manual U11316EJ4V1UD
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