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10.9.6 Operation as External Event Counter
An external event counter counts clock pulses (CI pin input pulses) input from off-chip.
As shown in Figure 10-56, the value of timer register 2 (TM2) is incremented in synchronization with a CI pin input valid
edge (specified as rising edge only).
CI Pin Input
TM2
Remark The TM2 value is one less than the number of input clock pulses.
The control register settings when TM2 operates as an external event counter are shown in Figure 10-57, and the setting
procedure in Figure 10-58.
CHAPTER 10 TIMER/COUNTER 2
Figure 10-56 External Event Counter Operation (Single Edge)
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