Pulse Width Measurement Operation - NEC uPD784038 Series User Manual

16-bit single-chip microcontrollers
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8.8.3 Pulse Width Measurement Operation

In pulse width measurement, the high-level or low-level width of external pulses input to the external interrupt request input
pin (INTP3) is measured.
Both the high-level and low-level widths of pulses input to the INTP3 pin must be at least 3 system clocks (0.19 µ s: f
= 16 MHz); if shorter than this, the valid edge will not be detected and a capture operation will not be performed.
This pulse width measurement can be performed within the range shown in Table 8-3 (f
As shown in Figure 8-37, the timer register 0 (TM0) value being counted is fetched into the capture register (CR02) in
synchronization with a valid edge (specified as both rising and falling edges) in the INTP3 pin input, and held there. The pulse
width is obtained from the product of the difference between the TM0 count value (D
detection of the nth valid edge and the count value (D
count clocks (x/f
; x = 8, 16, 32, 64, 128, 256, 512, 1,024, 2,048).
XX
The control register settings are shown in Figure 8-38, and the setting procedure in Figure 8-39.
TM0
Count Value
INTP3
External Input Signal
INTP3
Interrupt Request
Capture Register
(CR02)
OVF0
Remark Dn: TM0 count value (n = 0, 1, 2, ...)
x = 8, 16, 32, 64, 128, 256, 512, 1,024, 2,048
228
CHAPTER 8 TIMER/COUNTER 0
) fetched and held on detection of valid edge n - 1, and the number of
n - 1
Figure 8-37 Pulse Width Measurement Timing
D0
0H
Capture
Count Start
(D1 to D0) × 8/f
User's Manual U11316EJ4V1UD
n
FFFFH
D1
D2
Capture
Capture
(10,000H to
XX
D1 + D2)
× 8/f
XX
D0
D1
Cleared by Software
= 16 MHz).
CLK
) fetched into and held in the CR02 on
FFFFH
D3
Capture
(D3 to D2)
× 8/f
XX
D2
D3
CLK

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