Ppg Output - NEC uPD784038 Series User Manual

8.7.4 PPG Output

(1) Basic Operation of PPG Output
This function outputs a square-wave with the time determined by compare register CR01 value as one cycle, and the time
determined by compare register CR00 value as the pulse width. The PWM cycle output by the PWM is made variable. This
signal can only be output from the timer output (TO0).
When this function is used, the CLR01 bit of capture/compare control register 0 (CRC0) must be set to 1.
The pulse cycle and pulse width are as shown below.
• PPG cycle = (CR01 + 1) × x/f
• PPG pulse width = CR00 × x/f
where 1 ≤ CR00 ≤ CR01
PPG pulse width
• Duty =
PPG cycle
Note Both CR00 and CR01 cannot be cleared to "0".
Figure 8-23 shows an example of PPG output using timer register 0 (TM0), Figure 8-24 shows an example of the case where
CR00 = CR01.
TM0
Count Value
INTC00
INTC01
TO0
(PPG Output)
TO1
(Timer Output)
Remark ALV0 = 0, ALV1 = 0
CHAPTER 8 TIMER/COUNTER 0
; x = 8, 16, 32, 64, 128, 256, 512, 1,024, 2,048
XX
XX
Note
Note
CR00
=
CR01 + 1
Figure 8-23 Example of PPG Output Using TM0
CR00
Count Start
0H
User's Manual U11316EJ4V1UD
CR01 CR01
CR00
Pulse
Width
Pulse Cycle
CR01
CR00
217