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4.2.2 Oscillation Stabilization Time Specification Register (OSTS)
OSTS is a register used to specify the operation of the oscillator. The EXTC bit of the OSTS specifies whether a crystal/
ceramic resonator or an external clock is used. The STOP mode can be set during use of external clock input, only when the
EXTC bit is set (to 1).
The OSTS can be written to only by an 8-bit transfer instruction.
RESET input clears the OSTS register contents to 00H.
The format of the OSTS is shown in Figure 4-4.
Figure 4-4 Oscillation Stabilization Time Specification Register (OSTS) Format
7
6
OSTS
EXTC
0
Cautions 1. When using a crystal/ceramic oscillation, the EXTC bit must be cleared (to 0). If the EXTC bit is set (to
1), oscillation will stop.
2. If the STOP mode is used with external clock input, the EXTC bit must be set (to 1) before setting the
STOP mode. If the STOP mode is used when the EXTC bit is in the cleared (to 0) state, the µ µ µ µ µ PD784038
may be damaged or suffer reduced reliability.
3. When setting the EXTC bit to 1 during external clock input, be sure to input a clock in phase reverse
to that of the clock input to the X1 pin, to the X2 pin. When the EXTC bit is set to 1, the µ µ µ µ µ PD784038
operates on only the clock input to the X2 pin.
CHAPTER 4 CLOCK GENERATOR
5
4
3
2
0
0
0
OSTS2
User's Manual U11316EJ4V1UD
1
0
Address
After Reset
OSTS1
OSTS0
0FFCFH
Oscillation Stabilization Time Selection
(See Figure 24-4 for details)
EXTC
0
Crystal/ceramic oscillation used
External clock (drives X1 only)
External clock (drives X1 and X2)
1
R/W
00H
R/W
External Clock Selection
107
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