Schematic Diagrams; Ez80 ® Development Platform - ZiLOG eZ80F92 User Manual

hematic Diagrams
®
eZ80 Development Platform
Figures 17 through 21 diagram the layout of the eZ80
DO NOT USE J6_17 AND J6_35
J6
VCC
1 2
9V_DC
9VDC 3 4
ID_2
SCL 5 6
ID_1
SDA 7 8
GND ID_0
9 10
-MOD_DIS
11 12
GND
-MWAIT 13 14
EM_D0
15 16
-CS3
17 18
GND GND
19 20
EM_D7 PD7_RI0
21 22
EM_D6 23 24 PD6_DCD0
EM_D5 25 26 PD5_DSR0
EM_D4 27 28 PD4_DTR0
EM_D3 29 30 PD3_CTS0
EM_D2 31 32 PD2_RTS0
EM_D1 PD1_RXD0
33 34
35 36 PD0_TXD0
GND GND
37 38
PB7_MOSI
PC7_RI1
39 40
PB6_MISO
PC6_DCD1 41 42
PB5_T5_O
PC5_DSR1 43 44
PB4_T4_O
PC4_DTR1
45 46
PB3_SCK
PC3_CTS1 47 48
PB2_SS
PC2_RTS1 49 50 PB2_SS
PB1_T1_I
PC1_RXD1 PB1_T1_I
51 52
PB0_T0_I
PC0_TXD1 53 54 PB0_T0_I
55 56
57 58
59 60
GND
Header 30x2
J8
VDD GND
1 2
A0 A1
3 4
A2 A3
5 6
A4 A5
7 8
A6 A7
9 10
GND GND
11 12
A8 A9
13 14
A10 A11
15 16
A12 A13
17 18
A14 A15
19 20
GND GND
21 22
A16 A17
23 24
A18 A19
25 26
A20 A21
27 28
A22 A23
29 30
VDD VDD
31 32
-RD 33 34
-RESET
35 36
-BUSACK 37 38
PHI
-NMI 39 40
GND
GND
41 42
D0 D1
43 44
D2 D3
45 46
D5
D4
47 48
D6 D7
49 50
GND GND
51 52
-CS0 53 54 -CS1
-CS2 55 56 -CS_EX
-IORQ
-MEMRQ 57 58
GND
VDD
59 60
Header 30x2
VDD
U9A
1
3 2
3
2
TC74LVC08
VDD
U8A
GND
GND
R5 TDI
TDO
1K
TC74LVT125
TCK
TVCC_RESETn
VDD
904-0203
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®
Development Platform.
MA6 MA0
1 2
MA10 MA3
3 4
GND VDD
5 6
MA8 MA7
7 8
MA13 MA9
9 10
MA15 MA14
11 12
MA18 MA16
ID_2 13 14
MA19 GND
ID_1 15 16
MA2 MA1
ID_0 17 18
MA11 MA12
-CON_DIS
19 20
MA4 MA20
21 22
MA5 MA17
23 24
-DIS_ETH -DIS_FL
-DIS_ETH
25 26
MA21 VDD
27 28
MA22 MA23
29 30
-M_CS0 -M_CS1
31 32
-M_CS2 MD0
33 34
MD1 MD2
35 36
MD3 MD4
37 38
MD5 GND
39 40
MD7 MD6
41 42
-M_MEMRQ -M_IORQ
43 44
GND -M_RD
45 46
-M_WR INSTRD
47 48
-BUSACK -BUSREQ
49 50
Header 25x2
R1
10K
JP2
PB7_MOSI PB6_MISO
1 2
PB5_T5_O PB4_T4_O
3 4
VDD PB3_SCK PB2_SS
5 6
PB1_T1_I PB0_T0_I
7 8
GND PC7_RI1
9 10
PC6_DCD1 PC5_DSR1
11 12
PC4_DTR1 PC3_CTS1
13 14
PC2_RTS1 PC1_RXD1
15 16
PC0_TXD1 PD7_RI0
17 18
PD6_DCD0 GND
19 20
PD5_DSR0 PD4_DTR0
21 22
PD3_CTS0 PD2_RTS0
23 24
PD1_RXD0 PD0_TXD0
25 26
TDO TDI
27 28
GND TRIGOUT
29 30
TCK TMS
31 32
VDD RTC_VDD M_PHI
33 34
SCL GND
35 36
SDA
37 38
R3 -FLASHWE
39 40
10K -M_CS3 -DIS_IRDA
41 42
-RESET
-MWAIT
43 44
VDD GND
45 46
HALT_SLP -NMI
47 48
VDD
49 50
Header 25x2
-WR
R19
INSTRD
VDD
-BUSREQ
PHI
10K
ZDI
INTERFACE
J4
VDD PRSTn
1 2
TCK
3 4
GND TDI
5 6
Header 3x2
VDD
R4
10K
DCD
-RESET
D1
1 2
RX
D2
1 2
P1
DTR
D3
1 2
1 2
3 4
GND
5 6
TX
D4
7 8
TMS 1 2
9 10
PRSTn
11 12
TRIGOUT
13 14
con 7x2
®
Figure 17. eZ80 Development Platform Schematic Diagram, #1 of 5
A[23:0]
U1
A[23:0]
MA0 A0
2 18
A1 Y1
MA1 A1
4 16
A2 Y2
MA2 A2
6 14
A3 Y3
MA3 A3
8 12
A4 Y4
MA4 A4
11 9
A5 Y5
MA5 13 7 A5
A6 Y6
MA6 A6
15 5
A7 Y7
MA7 A7
17 3
A8 Y8
VDD
1 20
1OE VCC
GND
19 10
-DIS_FL
2OE GND
C30
0.1uF
74LVC244A
U3
MA8 A8
2 18
A1 Y1
MA9 A9
4 16
A2 Y2
MA10 A10
6 14
A3 Y3
MA11 A11
8 12
A4 Y4
MA12 A12
11 9
A5 Y5
MA13 A13
13 7
A6 Y6
MA14 A14
15 5
A7 Y7
MA15 A15
17 3
A8 Y8
VDD
R2 1 20
1OE VCC
10K GND
19 10
2OE GND
C31
0.1uF
VDD 74LVC244A
U5
MA16 A16
2 18
A1 Y1
MA17 A17
4 16
A2 Y2
MA18 A18
6 14
A3 Y3
MA19 A19
8 12
A4 Y4
MA20 A20
11 9
A5 Y5
MA21 A21
13 7
A6 Y6
MA22 A22
15 5
A7 Y7
MA23 17 3 A23
A8 Y8
VDD
1 20
1OE VCC
GND 19 10 GND
2OE GND
C33
0.1uF
74LVC244A
J5 J1
MODEM's
M_TIP
1 1
AGND
M_TIP
M_RING
2 2
M_RING -MOD_DIS
3
VCC
4
5
HEADER 2
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
J9 21
22
23
-MRESET GND
1 24
-MRESET
2 25 PC4_DTR1
R8
GND PC6_DCD1
3 26
PC3_CTS1
0 4 27
5 28 PC5_DSR1
R9
PC7_RI1
6 29
PC0_TXD1
0 7 30
PC1_RXD1
8 31
R20
PC2_RTS1
9 32
0
R21
HEADER 9
0 HEADER 32
MODEM CONNECTORS
PRELIMINARY
eZ80F92 Development Kit
U2
1 5
A0 SDA
GND
2
A1
8
VCC
SCL
6
SCL
4
GND
7 3
WP NC
J2
1 AT24C128
-DIS_IRDA
GND GND
2
HEADER 2
J7
-FLASHWE
1
GND
2
U21
HEADER 2
-M_CS0
2 23
A1 Y1 -CS0
-M_CS1
3 22
A2 Y2 -CS1
-M_CS2
4 21
-CS2
A3 Y3
-M_IORQ
5 20
A4 Y4 -IORQ
-M_MEMRQ
6 19
A5 Y5 -MEMRQ
-M_WR
7 18
-WR
A6 Y6
-M_RD 8 17
A7 Y7 -RD
-M_CS3
9 16
A8 Y8 -CS3
M_PHI
10 15
PHI
A9 Y9
11 14
A10 Y10
VDD
1 24
OE1 VCC
GND GND
13 12
OE2 GND
74LVC827/SO
J12
VCC
1
2
VDD
3
Header 3
D[7:0]
U7
MD0 D0
2 18
A0 B0
MD1 D1
3 17
A1 B1
MD2
4 16 D2
A2 B2
MD3 D3
5 15
A3 B3
MD4 D4
6 14
A4 B4
MD5 D5
7 13
A5 B5
MD6 D6
8 12
A6 B6
MD7 D7
9 11
A7 B7
-M_RD VDD
1 20
DIR VCC
19 10
-L_RD
OE GND
C1
0.1uF
74LVC245/SO
GND
MD0
MD1
VCC MD2
VCC
MD3
VDD MD4
VDD
GND MD5
GND
MD6
MD7

Schematic Diagrams

User Manual
59
SDA
VDD
C34
0.1uF
D[7:0]
MD[7:0]