ZiLOG eZ80F92 User Manual page 26

eZ80F92 Development Kit
User Manual
16
Operational Description
Downloaded from Elcodis.com electronic components distributor
I/O Connector
Figure 7 illustrates the pin layout of the I/O Connector in the 50-pin
header, located at position JP2 on the eZ80
Table 3 describes the pins and their functions.
PB7
PB5
PB3
PB1
GND_EXT
PC6
PC4
PC2
PC0
PD6
PD5
PD3
PD1
TDO
GND_EXT
TCK
RTC_VDD
IICSCL
IICSDA
FLASHWE
CS3
RESET
V3.3_EXT
HALT_SLP
V3.3_EXT
Figure 7. eZ80
I/O Connector Pin Configuration—JP2
®
Development Platform.
JP2
PB6
1 2
PB4
3 4
PB2
5 6
PB0
7 8
PC7
9 10
PC5
11 12
PC3
13 14
PC1
15 16
PD7
17 18
GND_EXT
19 20
PD4
21 22
PD2
23 24
PD0
25 26
TDI
27 28
TRIGOUT
29 30
TMS
31 32
EZ80CLK
33 34
35 36
GND_EXT
37 38
39 40
DIS_IRDA
41 42
WAIT
43 44
GND_EXT
45 46
NMI
47 48
49 50
HEADER 25X2
IDC50
®
Development Platform
PRELIMINARY UM013904-0203