ZiLOG eZ80F92 User Manual page 85

UM013904-0203
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output
nCS_EX /* synthesis loc="P17"*/,
nmemen1 /* synthesis loc="P18"*/,
nmemen2 /* synthesis loc="P19"*/,
nmemen3 /* synthesis loc="P20"*/,
nmemen4 /* synthesis loc="P21"*/,
nEM_EN /* synthesis loc="P24"*/,
nDIS_FL /* synthesis loc="P25"*/,
nL_RD /* synthesis loc="P23"*/
;
wire nCS_EX,
nmemen1,
nmemen2,
nmemen3,
nmemen4;
//wire MOD_DIS =
((nmemen1==0)|(nmemen2==0)|(nmemen3==0)|(nmemen4==0));//if any
wire nEXP_EN = ~((nCS0==0)&(A7==0)&(A6==1));//expansion module
//wire nDIS_FL = (nFL_DIS) ? ~nEXP_EN : ~(nFL_DIS);
eZ80F92 Development Kit
//enables memory on the
//Expansion Module
//enables memory on the
//Development Platform
//enables LED and Port A
//emulation
//of the signals is Low,
//Flash on the Module will be
//disabled if nDIS_FL is High
//Flash enabled if this is 0
PRELIMINARY
User Manual
General Array Logic Equations
75