Table 4. Gpio Connector J6 - ZiLOG eZ80F92 User Manual

Signal
SCL
SDA
MOD_DIS
MWAIT
EM_D0
CS3
EM_D[7:1]
Reserved
Note: *All of the signals are driven directly by the CPU.
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®
the eZ80 Development Platform, because the eZ80F92 Flash Module
features the eZ80F92 microcontroller. To mount an application module,
use the two male headers J6 and J8.
Jumper J6 carries the General Purpose Input/Output ports (GPIO), and
jumper J8 carries memory and control signals. To design an application
module, the user should be familiar with the architecture and features of
the eZ80F92 Flash Module currently installed. Tables 4 and 5 list the sig-
nals and functions related to each of these jumpers by pin. Power and
ground signals are omitted for the sake of simplicity.

Table 4. GPIO Connector J6*

Pin # Function
2
5 I C Clock
2
7 I C Data
9 Modem Disable
13 Wait signal for the
CPU
15 Emulated Port A,
Bit 0
17 Chip Select 3 of
the CPU
21,23,25, Emulated Port A,
27,29,31, Bit [7:1]
33
35
PRELIMINARY
eZ80F92 Development Kit
Direction Notes
Bidirectional
Bidirectional
Input If a shunt is installed between
pins 6 and 9, the modem
function on the eZ80
Development Platform is
disabled.
Input
Bidirectional
Output This signal is also present on
the J8.
Bidirectional
User Manual
®
Operational Description
21