Schematic Diagrams; Ez80 ® Development Platform - ZiLOG eZ80F92 User Manual

Schematic Diagrams

®
eZ80 Development Platform
Figures 17 through 21 diagram the layout of the eZ80
DO NOT USE J6_17 AND J6_35
J6
VCC
1 2
9V_DC
9VDC
3 4
SCL 5 6
SDA
7 8
GND
9 10
-MOD_DIS
11 12
-MWAIT 13 14
EM_D0 15 16
-CS3
17 18
GND
19 20
EM_D7
21 22
EM_D6 23 24
EM_D5 25 26
EM_D4 27 28
EM_D3 29 30
EM_D2
31 32
EM_D1 33 34
35 36
GND
37 38
PC7_RI1 39 40
PC6_DCD1 41 42
PC5_DSR1 43 44
PC4_DTR1
45 46
PC3_CTS1 47 48
PC2_RTS1
49 50
PC1_RXD1 51 52
PC0_TXD1
53 54
55 56
57 58
59 60
GND
Header 30x2
J8
VDD
1 2
A0
3 4
A2
5 6
A4
7 8
A6
9 10
GND
11 12
A8
13 14
A10
15 16
A12
17 18
A14
19 20
GND
21 22
A16
23 24
A18
25 26
A20
27 28
A22
29 30
VDD
31 32
-RD 33 34
-RESET
35 36
-BUSACK 37 38
-NMI 39 40
GND
41 42
D0
43 44
D2
45 46
D4
47 48
D6
49 50
GND
51 52
-CS0 53 54
-CS2 55 56
-MEMRQ 57 58
VDD
59 60
Header 30x2
VDD
U9A
3 2
3
VDD
U8A
GND
GND
R5
1K
TC74LVT125
TVCC_RESETn
UM013904-0203
MA6
1 2
MA10
3 4
GND
5 6
MA8
7 8
MA13
9 10
MA15
11 12
ID_2 MA18
ID_2 13 14
ID_1 MA19
ID_1
15 16
ID_0 MA2
ID_0 17 18
MA11
-CON_DIS
19 20
GND MA4
21 22
MA5
23 24
-DIS_ETH
-DIS_ETH 25 26
GND MA21
27 28
MA22
PD7_RI0
29 30
-M_CS0
PD6_DCD0 31 32
-M_CS2
PD5_DSR0 33 34
MD1
PD4_DTR0 35 36
MD3
PD3_CTS0 37 38
MD5
PD2_RTS0
39 40
MD7
PD1_RXD0 41 42
-M_MEMRQ
PD0_TXD0
43 44
GND GND
45 46
PB7_MOSI -M_WR
47 48
PB6_MISO -BUSACK
49 50
PB5_T5_O
PB4_T4_O
Header 25x2
PB3_SCK
R1
PB2_SS 10K
JP2
PB2_SS
PB1_T1_I PB7_MOSI
PB1_T1_I 1 2
PB0_T0_I PB5_T5_O
PB0_T0_I
3 4
VDD PB3_SCK
5 6
PB1_T1_I
7 8
GND
9 10
PC6_DCD1
11 12
PC4_DTR1
13 14
PC2_RTS1
15 16
PC0_TXD1
17 18
PD6_DCD0
19 20
GND PD5_DSR0
21 22
A1 PD3_CTS0
23 24
A3 PD1_RXD0
25 26
A5 TDO
27 28
A7 GND
29 30
GND TCK
31 32
A9 VDD RTC_VDD
33 34
A11 SCL
35 36
A13 SDA
37 38
A15 -FLASHWE
R3
39 40
GND 10K -M_CS3
41 42
-RESET
A17
43 44
A19 VDD
45 46
A21 HALT_SLP
47 48
A23 VDD
49 50
VDD
Header 25x2
-WR
INSTRD
VDD
-BUSREQ
PHI
PHI
GND
D1
D3
D5
D7 ZDI
GND
INTERFACE
J4
-CS1
VDD PRSTn
-CS_EX 1 2
-IORQ
3 4
GND GND
5 6
Header 3x2
VDD
R4
10K
1
-RESET
2
TC74LVC08 RX
D2
1
P1
TDI
1 2
TDO
3 4
TCK GND
5 6
TX D4
7 8
TMS 1
9 10
VDD PRSTn
11 12
TRIGOUT
13 14
con 7x2
®
Figure 17. eZ80 Development Platform Schematic Diagram, #1 of 5
®
Development Platform.
MA0
U1
MA3
VDD MA0 A0
2 18
A1 Y1
MA7 MA1 A1
4 16
A2 Y2
MA9 MA2 A2
6 14
A3 Y3
MA14 MA3 A3
8 12
A4 Y4
MA16 MA4 A4
11 9
A5 Y5
GND MA5 A5
13 7
A6 Y6
MA1 MA6 A6
15 5
A7 Y7
MA12 MA7 A7
17 3
A8 Y8
MA20
MA17 VDD
1 20
1OE VCC
-DIS_FL GND
19 10
-DIS_FL 2OE GND
VDD
MA23
-M_CS1 74LVC244A
MD0
U3
MD2
MD4 MA8 A8
2 18
A1 Y1
GND MA9 A9
4 16
A2 Y2
MD6 MA10 6 14 A10
A3 Y3
-M_IORQ MA11 A11
8 12
A4 Y4
-M_RD MA12 11 9 A12
A5 Y5
INSTRD MA13 A13
13 7
A6 Y6
-BUSREQ MA14 A14
15 5
A7 Y7
MA15 A15
17 3
A8 Y8
VDD
R2 1 20
1OE VCC
10K GND
19 10
2OE GND
PB6_MISO
PB4_T4_O
PB2_SS VDD 74LVC244A
PB0_T0_I
PC7_RI1 U5
PC5_DSR1
PC3_CTS1 MA16 A16
2 18
A1 Y1
PC1_RXD1 MA17 A17
4 16
A2 Y2
PD7_RI0 MA18 A18
6 14
A3 Y3
GND MA19 A19
8 12
A4 Y4
PD4_DTR0 MA20 A20
11 9
A5 Y5
PD2_RTS0 MA21 A21
13 7
A6 Y6
PD0_TXD0 MA22 A22
15 5
A7 Y7
TDI MA23 A23
17 3
A8 Y8
TRIGOUT
TMS VDD
1 20
1OE VCC
M_PHI GND 19 10 GND
2OE GND
GND
74LVC244A
-DIS_IRDA
-MWAIT
GND J5 J1
-NMI
M_TIP
1 1
M_TIP
M_RING
2 2
M_RING
3
R19
4
5
HEADER 2
6
7
10K 8
9
10
11
12
13
14
TCK
15
TDI
16
17
18
19
20
J9 21
22
23
-MRESET
1 24
-MRESET
DCD 2 25
R8
GND
D1 3 26
0
1 2 4 27
5 28
R9
6 29
2 0 7 30
8 31
R20
DTR
D3 9 32
1 2 0
R21
0 HEADER 9 HEADER 32
2
MODEM CONNECTORS
PRELIMINARY
eZ80F92 Development Kit
A[23:0]
A[23:0]
1
GND
2
SCL
6
7
J2
1
-DIS_IRDA
GND GND
2
C30
0.1uF
HEADER 2
J7
-FLASHWE
1
2 GND
U21
HEADER 2
-M_CS0
2
A1
-M_CS1
3
A2
-M_CS2
4
A3
-M_IORQ
5
A4
-M_MEMRQ
6
A5
C31 -M_WR
7
A6
0.1uF -M_RD
8
A7
-M_CS3
9
A8
M_PHI
10
A9
11
A10
1
OE1
GND
13
OE2
74LVC827/SO
J12
VCC
C33
1
0.1uF
2
VDD
3
Header 3
MODEM's
AGND
-MOD_DIS
U7
VCC
MD0
2 18
A0 B0
MD1
3 17
A1 B1
MD2
4 16
A2 B2
MD3
5 15
A3 B3
MD4
6 14
A4 B4
MD5
7 13
A5 B5
MD6
8 12
A6 B6
MD7
9 11
A7 B7
-M_RD VDD
1 20
DIR VCC
19 10
-L_RD
OE GND
74LVC245/SO
GND
VCC
VCC
GND
PC4_DTR1 VDD
VDD
PC6_DCD1 GND
GND
PC3_CTS1
PC5_DSR1
PC7_RI1
PC0_TXD1
PC1_RXD1
PC2_RTS1
User Manual
59
U2
SDA
5
A0 SDA
A1
VDD
8
VCC
SCL
4
GND
3
WP NC
AT24C128
23
Y1 -CS0
22
Y2 -CS1
21
-CS2
Y3
20
Y4 -IORQ
19
-MEMRQ
Y5
18
Y6 -WR
17
-RD
Y7
16
Y8 -CS3
15
Y9 PHI
14
Y10
VDD
24
VCC
GND
12
GND
C34
0.1uF
D[7:0]
D[7:0]
D0
D1
D2
D3
D4
D5
D6
D7
C1
0.1uF
MD[7:0]
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
Schematic Diagrams