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Chapter 17. Unused Interface
17.1
Unused MPIO Interfaces
The following Jetson AGX Xavier pins (and groups of pins) are Jetson AGX Xavier MPIO (Multi-
purpose Standard CMOS Pad) pins that support either special function IOs (SFIO) and/or GPIO
capabilities. Any unused pins or portions of pin groups listed in the following table that are not
used can be left unconnected.
Table 17-1.
Unused MPIO Pins and Pin Groups
Module Pins / Pin Groups
I2Sx, AUD_MCLK, DSPKx, DMICx
SDMMCx
MIPI_TRC_x
EQOSx
QSPIx
Ux3_x
I2Cx
SPIx
CANx
VGPx
17.2
Unused SFIO Interface Pins
See the "Unused SFIO (Special Function I/O) Interface Pins" section in the pin description
checklist attached to this design guide.
To access the attached file, click the Attachment icon on the left-hand toolbar on this PDF
(using Adobe Acrobat Reader or Adobe Acrobat). Select the file and use the Tool Bar options
(Open, Save) to retrieve the documents.
Excel files with the .nvxlsx extension will need to be renamed to .xlsx to open.
Jetson AGX Xavier Series Product
Terminations
Module Pins / Pin Groups
SLVSx
IQCx
UFSx
PEx, PEX_CLKx
DP_AUXx
GP_PWMx
CCLAx
SCE_SAFE_STATE
SOC_THERMx
PMICINTR
Module Pins / Pin Groups
GPIO_AO_RET
WDT_RESET_x
TOUCH_x
EXTPERIPHx
IGPUx
SATA_LED_ACTIVE
NV_THERMx
ISTCTRLx
DCx
DGPU_x
DG-09840-001_v2.5 | 125
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