Figure 13-7. Jetson Agx Xavier Uart Connections; Table 13-11. Uart Signal Connections - Nvidia Jetson AGX Xavier Series Design Manual

Figure 13-7. Jetson AGX Xavier UART Connections
Jetson AGX Xavier
SoC – UART
CAM
UART1_TX
UART1_RX
UART1_RTS
UART1_CTS
UART
UART2_TX
UART2_RX
UART2_RTS
UART2_CTS
UART5_TX
UART5_RX
UART5_RTS
UART5_CTS
AO
UART3_TX
UART3_RX
SPI2_SCK
SPI2_MISO
SPI2_MOSI
SPI2_CS0
CONN
UART4_TX
UART4_RX
UART4_RTS
UART4_CTS
Notes: UART4 pins do not support UART functionality and UART4_RX pin is reserved and must be
tied to GND through a 10 kΩ resistor. See the routing requirements in Table 13-12. UART4_TX,
UART4_RTS and UART4_CTS are available for use as GPIOs.
Care must be taken that any of the UART pins with straps associated with them are not pulled up
and down or driven up and down by connected devices that would affect the strap level at power-
on.
Table 13-11. UART Signal Connections
Module Pin Name
UART[5,2:1]_TX, UART3_TX_DEBUG and
SPI2_CLK (UART7_TX)
UART[5,2:1]_RX, UART3_RX_DEBUG and
SPI2_MISO (UART7_RX)
UART[5,2:1]_CTS and SPI2_CS0_N
(UART7_CTS)
UART[5,2:1]_RTS and SPI2_MOSI
(UART7_RTS)
Jetson AGX Xavier Series Product
(BOOT_SEL2 Strap) UART1_TX
K53
UART 1_RX
K54
(UFS_SEL Strap) UART1_RTS
L51
UART 1_CTS
H54
(RAM_CODE3 Strap) UART 2_TX
C58
UART 2_RX
C56
(RAM_CODE2 Strap) UART 2_RTS
G58
UART 2_CTS
A57
(RAM_CODE1 Strap) UART 5_TX
J58
UART 5_RX
H58
(RAM_CODE0 Strap) UART 5_RTS
K58
UART 5_CTS
H57
UART 3_TX_DEBUG
H62
UART 3_RX_DEBUG
K60
SPI2_CLK UART 7_TX (UG3_TXD)
E61
UART 7_RX (UG3_RXD)
SPI2_MISO
D62
SPI2_MOSI UART 7_RTS (UG3_RTS)
F60
SPI2_CS0_N UART 7_CTS (UG3_CTS)
D60
(BOOT_SEL1 Strap) UART4_TX
L5
UART 4_RX (RSVD)
L48
(BOOT_SEL0 Strap) UART4_RTS
L4
UART 4_CTS
L49
Type Termination
O
I
I
O
Routed on carrier board to Expansion Connector
through selectable voltage level shifter (1.8V or 3.3V)
Routed on carrier board to UART-USB Bridge
Routed on carrier board to M.2 Key E Connector
Routed on carrier board to UART-USB Bridge
Routed to PCIe x16 connector on carrier board.
Alternately available for general SPI usage or as
additional UART interface.
Used for Camera GPIO on carrier board
10kΩ
Used for Camera GPIO on carrier board
Unused on carrier board – Available to use as GPIO
Description
UART Transmit: Connect to Peripheral RXD pin of device
UART Receive: Connect to Peripheral TXD pin of device
UART Clear to Send: Connect to Peripheral RTS_N pin
of device
UART Request to Send: Connect to Peripheral CTS pin
of device
Miscellaneous Interfaces
DG-09840-001_v2.5 | 111