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Figure 9-9.
HDMI CLK and Data Topology
Jetson
SoC
Notes:
1. RPD pad must be on the main trace. RPD and ACCAP must be on same layer.
2. Chokes (600 Ω @ 100 MHz) or narrow traces (1 uH @ DC-100 MHz) between pull-downs and
FET are chokes between pull-downs and FET are optional improvements for HDMI 2.0
operation.
3. The trace after the main route via should be routed on the top or bottom layer of the PCB,
and either with 100 ohm differential impedance, or as uncoupled 50 ohm SE traces.
4. See the RS section in Table 9-5 for details.
Table 9-5.
HDMI Interface Signal Routing Requirements
Parameter
Electrical Specification
IL
Resonance dip frequency
TDR dip
FEXT (PSFEXT)
Impedance
Trace impedance: Diff pair
Reference plane
Trace spacing/Length/Skew
Trace loss characteristic:
PRELIMINARY INFORMATION
NVIDIA Jetson Orin NX
AC
CAP
Main Route –
Seg A
0.1uF
Seg B
95-100Ω
100Ω*
* Note 3
0.1uF
95-100Ω
100Ω*
Seg C
PCB Vias
499Ω,
R
PD
1%
PCB Vias
MOD_SLEEP*
Requirement
<= 1.7
<= 2
<= 3
< 4.3
> 12
>= 85
<= -50
<= -40
<= -40
IL/FEXT plot: See HDMI Guideline
Figure 9-9
100
GND
< 1.1
< 0.8
< 0.4
Common Mode
R
S
Chokes & ESD
(See Note 4)
Seg D
Seg E
100Ω*
100Ω*
* Note 3
* Note 3
100Ω*
100Ω*
See Note 1
499Ω,
1%
Choke or Trace
See Note 2
Units
Notes
dB @ 1GHz
For HDMI 2.0, 6 dB and 6 GHz is
dB @ 1.5GHz
supported.
dB @ 3GHz
dB @ 6GHz
GHz
Ω @ Tr=200ps
10%-90%. If TDR dip is 75~85 ohm that
dip width should < 250 ps
dB at DC
PSNEXT is derived from an algebraic
dB at 3GHz
summation of the individual NEXT effects
dB at 6GHz
on each pair by the other pairs
TDR plot: See Figure 9-11
Ω
±10%. Target is 100Ω. 95Ω for the
breakout and main route is an
implementation option.
dB/in. @ 6GHz
The max length (delay) is derived based
dB/in. @ 3GHz
on this characteristic. The length (delay)
dB/in. @ 1.5GHz
constraint must be re-defined if the loss
characteristic is changed. See Note 1.
DG-10931-001_v0.1 | 47
Display
Seg F
100Ω*
HDMI
* Note 3
Conn
100Ω*
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