ADV7181B
TIMING SPECIFICATIONS
Guaranteed by characterization. A
operating temperature range, unless otherwise noted.
Table 3.
1, 2
Parameter
SYSTEM CLOCK AND CRYSTAL
Nominal Frequency
Frequency Stability
2
I
C PORT
SCLK Frequency
SCLK Min Pulse Width High
SCLK Min Pulse Width Low
Hold Time (Start Condition)
Setup Time (Start Condition)
SDA Setup Time
SCLK and SDA Rise Time
SCLK and SDA Fall Time
Setup Time for Stop Condition
RESET FEATURE
Reset Pulse Width
CLOCK OUTPUTS
LLC1 Mark Space Ratio
DATA AND CONTROL OUTPUTS
Data Output Transitional Time
Data Output Transitional Time
1
Temperature range: T
to T
MIN
2
The min/max specifications are guaranteed over this range.
ANALOG SPECIFICATIONS
Guaranteed by characterization. A
operating temperature range, unless otherwise noted. Recommended analog input video signal range: 0.5 V to 1.6 V, typically 1 V p-p.
Table 4.
Parameter
1, 2
CLAMP CIRCUITRY
External Clamp Capacitor
Input Impedance
Large Clamp Source Current
Large Clamp Sink Current
Fine Clamp Source Current
Fine Clamp Sink Current
1
Temperature range: T
to T
MIN
2
The min/max specifications are guaranteed over this range.
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= 3.15 V to 3.45 V, D
VDD
Symbol
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
:t
9
10
t
11
t
12
, –40°C to +85°C.
MAX
= 3.15 V to 3.45 V, D
VDD
Symbol
, –40°C to +85°C
MAX
= 1.65 V to 2.0 V, D
VDD
VDDIO
Test Conditions
Negative clock edge to start of
valid data (t
= t
– t
ACCESS
10
End of valid data to negative
clock edge (t
= t
+ t
HOLD
9
12
= 1.65 V to 2.0 V, D
VDD
VDDIO
Test Conditions
Clamps switched off
Rev. B | Page 8 of 100
= 3.0 V to 3.6 V, P
= 1.65 V to 2.0 V;
VDD
Min
Typ
Max
27.00
±50
400
0.6
1.3
0.6
0.6
100
300
300
0.6
5
45:55
55:45
3.4
)
11
2.4
)
= 3.0 V to 3.6 V, P
= 1.65 V to 2.0 V;
VDD
Min
Typ
0.1
10
0.75
0.75
60
60
Unit
MHz
ppm
kHz
μs
μs
μs
μs
ns
ns
ns
μs
ms
% duty cycle
ns
ns
Max
Unit
μF
MΩ
mA
mA
μA
μA
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