Global Status Registers; Identification; Status 1; Autodetection Result - Analog Devices ADV7181BCP Manual

ADV7181B

GLOBAL STATUS REGISTERS

Four registers provide summary information about the video
decoder. The IDENT register allows the user to identify the
revision code of the ADV7181B. The other three registers
contain status bits from the ADV7181B.

IDENTIFICATION

IDENT[7:0] Address 0x11[7:0]
The register identification of the revision of the ADV7181B.
An identification value of 0x11 indicates the ADV7181 released
silicon.
An identification value of 0x13 indicates the ADV7181B silicon.

STATUS 1

STATUS_1[7:0] Address 0x10[7:0]
This read-only register provides information about the internal
status of the ADV7181B.
See the CIL[2:0] Count Into Lock, Address 0x51[2:0] and the
COL[2:0] Count Out-of-Lock, Address 0x51[5:3] sections for
information on the timing.
Depending on the setting of the FSCLE bit, the Status 0 and
Status 1 are based solely on horizontal timing information or on
the horizontal timing and lock status of the color subcarrier. See
the FSCLE FSC Lock Enable, Address 0x51[7] section.

AUTODETECTION RESULT

AD_RESULT[2:0] Address 0x10[6:4]
The AD_RESULT[2:0] bits report back on the findings from the
ADV7181B autodetection block. Consult the General Setup
section for more information on enabling the autodetection
block, and the Autodetection of SD Modes section to determine
how to configure it.
Table 13. AD_RESULT Function
AD_RESULT[2:0]
000
001
010
011
100
101
110
111
Downloaded from Elcodis.com electronic components distributor
Description
NTSM-MJ
NTSC-443
PAL-M
PAL-60
PAL-B/G/H/I/D
SECAM
PAL-Combination N
SECAM 525
Rev. B | Page 18 of 100
Table 14. STATUS 1 Function
STATUS 1[7:0] Bit Name
0 IN_LOCK
1 LOST_LOCK
2 FSC_LOCK
3 FOLLOW_PW
4 AD_RESULT.0
5 AD_RESULT.1
6 AD_RESULT.2
7 COL_KILL

STATUS 2

STATUS_2[7:0], Address 0x12[7:0]
Table 15. STATUS 2 Function
STATUS 2[7:0] Bit Name
0 MVCS DET
1 MVCS T3
2 MV_PS DET
3 MV_AGC DET
4 LL_NSTD
5 FSC_NSTD
6 Reserved
7 Reserved

STATUS 3

STATUS_3[7:0], Address 0x13[7:0]
Table 16. STATUS 3 Function
STATUS 3[7:0] Bit Name
0 INST_HLOCK
1 GEMD
2 SD_OP_50HZ
3
4 FREE_RUN_ACT
5 STD_FLD_LEN
6 INTERLACED
7
PAL_SW_LOCK
Description
In lock (right now).
Lost lock (since last read
of this register).
F locked (right now).
SC
AGC follows peak white
algorithm.
Result of autodetection.
Result of autodetection.
Result of autodetection.
Color kill active.
Description
Detected Macrovision color
striping.
Macrovision color striping
protection. Conforms to
Type 3 (if high), and Type 2
(if low).
Detected Macrovision
pseudo sync pulses.
Detected Macrovision AGC
pulses.
Line length is nonstandard.
F frequency is
SC
nonstandard.
Description
Horizontal lock indicator
(instantaneous).
Gemstar Detect.
Flags whether 50 Hz or
60 Hz are present at output.
Reserved for future use.
ADV7181B outputs a blue
screen (see the
DEF_VAL_EN Default Value
Enable, Address 0x0C[0]
section).
Field length is correct for
currently selected video
standard.
Interlaced video detected
(field sequence found).
Reliable sequence of
swinging bursts detected.