Analog Devices AD9656 Manual
  1. Manuals
  2. Brands
  3. Analog Devices Manuals
  4. Media Converter
  5. AD9656
  6. Manual
Analog Devices AD9656 Manual

Analog Devices AD9656 Manual

Analog-to-digital converter
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
One Technology Way · P.O. Box 9106 · Norwood, MA 02062-9106 · Tel: 781.329.4700 · Fax: 781.461.3113 ·
www.analog.com
EVALUATING THE AD9656
ANALOG-TO-DIGITAL CONVERTER
Preface
This user guide describes the
AD9656
evaluation board AD9656EBZ, which provides the support
circuitry required to operate the ADC in its various modes and configurations. The application
software used to interface with the device is also described.
The
AD9656
data sheet provides additional information and should be consulted when using the
evaluation board. Documents and software tools are available at
AD9656
and
www.analog.com/hsadcevalboard. For additional information or questions, send an email to
highspeed.converters@analog.com.
Typical Measurement Setup
Rev 20 Feb 2014 17:53 | Page 1

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the AD9656 and is the answer not in the manual?

Questions and answers

Related Manuals for Analog Devices AD9656

Summary of Contents for Analog Devices AD9656

  • Page 1 One Technology Way · P.O. Box 9106 · Norwood, MA 02062-9106 · Tel: 781.329.4700 · Fax: 781.461.3113 · www.analog.com EVALUATING THE AD9656 ANALOG-TO-DIGITAL CONVERTER Preface This user guide describes the AD9656 evaluation board AD9656EBZ, which provides the support circuitry required to operate the ADC in its various modes and configurations. The application software used to interface with the device is also described.

  • Page 2: Helpful Documents

    On-board LDO regulator, needing a single external 6V, 2A dc supply ADC VREF configurable for ADC-internal reference, on-board reference, off-board reference VisualAnalog® and SPIController software interfaces Helpful Documents AD9656 data sheet High speed ADC FIFO evaluation kit (HSC-ADC-EVALEZ) HSC-ADC-EVALEZ Wiki Guide http://wiki.analog.com/resources/eval/hsc-adc-evald...

  • Page 3: Design And Integration Files

    Use a shielded, RG-58, 50Ω coaxial cable (optimally 1 m or shorter) to connect the signal generator. For best results, use a narrow-band, band-pass filter with 50Ω terminations and an appropriate center frequency. (Analog Devices, Inc. uses TTE, Allen Avionics, and K&L band-pass filters.)

  • Page 4: Evaluation Board Hardware

    HSC-ADC-EVALEZ capture board. If P101 and P103 have pin 1 jumpered to pin 2, do not connect the supplied 6V wall supply to the AD9656 evaluation board. When changing the configuration of P101 and P103, please remove both jumpers and then place them in their desired positions.

  • Page 5: Output Signals

    If an external clock source is used instead of the onboard crystal oscillator, it should also be supplied with a clean signal generator as previously specified for the analog input signals. Analog Devices evaluation boards typically can accept ~2.8V p-p or 13 dBm sine wave input for the clock at the board SMA clock connector.
  • Page 6 To apply a reference voltage from an external off-board source, connect Pin 2 (DUT_SENSE) to Pin 1 (AVDD) and apply the reference voltage to Pin 4 (DUT_VREF). The AD9656 reference voltage is specified to be from 1.0 V to 1.4 V. Rev 20 Feb 2014 17:53 | Page 6...

  • Page 7: How To Use The Software For Testing

    Figure 2. Default Jumper Connections for AD9656EBZ Board How To Use The Software For Testing Setting up the ADC Data Capture The installers for VisualAnalog and SPIController are in the following locations: ftp://ftp.analog.com/pub/HSSP_SW/VisualAnalog/VisualAnalog_Setup.exe ftp://ftp.analog.com/pub/adispi/A2DComponents/Install/SPIController_Setup.exe Run these installers on the PC that is connected to the evaluation setup before proceeding. After configuring the board hardware, set up the ADC data capture using the following steps: Start VisualAnalog on the connected PC.
  • Page 8 Figure 3. VisualAnalog, New Canvas Window After the template is selected, a message might appear asking if the default configuration can be used to program the FPGA (see Figure 4). If this message appears, click Yes, and the window will close.
  • Page 9 Figure 7. VisualAnalog Window Toolbar, Collapsed Display 5. In the ADC Data Capture Settings Window, General Tab, select AD9656 to be the device, enter the sample clock frequency (125 is the default value), as shown in Figure 8. The sample frequency entered here is used for scaling of frequency values in test results and graphs.
  • Page 10 6. In the ADC Data Capture Settings Window, Capture Board Tab, enter 60 in the Fill Delay field. Push the Browse button to navigate to the FPGA program file for the AD9656. The default installation location and filename will be similar to: C:\Program Files\Analog Devices\VisualAnalog\Hardware\HADv6\AD9656_hadv6fmc.mcs...

  • Page 11: Evaluation And Test

    125MSPS would exceed the driver and FPGA capabilities.) Leave the other checkboxes unchecked. Though the AD9656 supports a wide variety of converter/lane/sample rate configurations, the software supports only the configurations in the software menu as an out-of-the-box functional kit. If other sample rates or configurations are required, an additional external clock is likely needed.
  • Page 12 SPIController software desktop icon. If prompted for a configuration file, select .cfg file whose name begins with AD9656. If not prompted, check the title bar of the window to determine which configuration is loaded. If necessary, choose Cfg Open from the File menu and select the appropriate file based on your part type.
  • Page 13 Figure 12. SPI Controller, New DUT Button In the ADCBase0 tab of the SPIController window, find the CLOCK DIVIDE(B) box (see Figure 13), and the MODES(8) box (see Figure 14). If using the clock divider, use the drop-down box to select the correct clock divide ratio, if necessary.
  • Page 14 Figure 13. SPI Controller, CLOCK DIVIDE(B) Box Rev 20 Feb 2014 17:53 | Page 14...
  • Page 15 14. SPI Controller, Chip Power Mode - Digital Reset Selection In the ADCBase1 tab of the SPIController window, set the number of lanes the AD9656 will be configured to. Note that the number of lanes selected here must match the settings made in VisualAnalog as shown in Step 7, Figure 10 above.
  • Page 16 Figure 15. SPI Controller, Quick Configure Box Note that other settings can be changed on the ADCBase0 tab (see Figure 13) and the ADC A through ADC D tabs (see Figure 16) to set up the part in the desired mode. The ADCBase0 tab settings affect the entire part, whereas the settings on the ADC A through ADC D tabs each affect the selected channel only.

  • Page 17: Adjusting The Amplitude Of The Input Signal

    The next step is to adjust the amplitude of the input signal for each channel as follows: Adjust the amplitude of the input signal so that the fundamental is at the desired level. Examine the Fund Power reading in the left panel of the VisualAnalog Graph - AD9656 FFT window (see Figure 18).

  • Page 18: Troubleshooting Tips

    18. Graph Window of VisualAnalog Repeat this procedure for the other channels, if desired Click the floppy-disk icon within the VisualAnalog Graph - AD9656 FFT window to save the performance data as a .csv formatted file for plotting or analysis.
  • Page 19 Settings icon in the ADC Data Capture block in VisualAnalog. Then select the FPGA tab and verify that the proper FPGA .mcs file (one containing “AD9656” in the filename) is selected for the part. Then push the Program button. The LED should light up.

This manual is also suitable for:

Ad9656ebz

Table of Contents