Indication Signals; Psm Status Indication - Quectel BG95 A-GL Series Hardware Design

Lpwa module
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The voltage value on ADC pins can be read via AT+QADC=<port>:
AT+QADC=0: read the voltage value on ADC0.
AT+QADC=1: read the voltage value on ADC1.
For more details about the AT command, see document [3].
The resolution of the ADC interfaces is up to 12 bits. The following table describes the characteristic of
the ADC interfaces.
Table 22: Characteristics of ADC Interfaces
Name
Voltage Range
Resolution
NOTE
1.
ADC input voltage must not exceed 1.8 V.
2.
It is prohibited to supply any voltage to the ADC pin when VBAT is removed.
3.
It is recommended to use a resistor divider circuit for ADC application, and the divider's resistor
accuracy should be no less than 1 %.
4.
After the module is turned off or enters PSM, do not pull up any pin of ADC interfaces lest it cause
additional power consumption and potentially damage pins on the module.

4.5. Indication Signals

4.5.1. PSM Status Indication

Table 23: PSM_IND Pin Definition
Pin Name
Pin No.
PSM_IND
1
When PSM is enabled, the function of PSM_IND will be activated after the module is rebooted. When
PSM_IND is at a high level, the module is in a normal operation mode. When it is at a low level, the
module is in PSM.
BG95xA-GL_Hardware_Design
Min.
Typ.
0
-
6
-
I/O
Description
Indicate the module's power
DO
saving mode
LPWA Module Series
Max.
Unit
1.8
V
12
bit
Comment
1.8 V power domain.
If unused, keep this pin open.
57 / 102

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