Quectel BG95 A-GL Series Hardware Design page 48

3.11. PON_TRIG
The module provides one PON_TRIG pin. Drive PON_TRIG high and keep it high to wake up the module
from PSM. PON_TRIG is pulled down by default.
Table 13: Pin Definition of PON_TRIG
Pin Name Pin No.
PON_TRIG 96
PON_TRIG has the following functions:
Makes the module enter or exit e-l-DRX, PSM, sleep or power off mode.

Enables/disables the main UART interface communication function.

Turns on/off the module.

PON_TRIG must be designed to allow for external control. A reference circuit is shown in the following
figure.
In addition, a voltage divider circuit can be used to control PON_RIG. The voltage domain of the external
host and the voltage divider resistor should be selected with care. A voltage divider circuit in the 3.3 V
host voltage domain is shown in the following figure.
BG95xA-GL_Hardware_Design
I/O Description
Used for main UART function control and for
DI entering/exiting e-l-DRX, PSM, sleep or
power off mode.
Figure 21: PON_TRIG Reference Circuit 1
LPWA Module Series
Comment
1.8 V power domain.
Pulled down by default.
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