Quectel BG95 Series Hardware Design
  1. Manuals
  2. Brands
  3. Quectel Manuals
  4. GSM/GPRS Modules
  5. BG95 Series
  6. Hardware design

Quectel BG95 Series Hardware Design

Lpwa module series
Hide thumbs Also See for BG95 Series:
Table of Contents

Advertisement

Quick Links

BG95
Hardware Design
LPWA Module Series
Rev. BG95_Hardware_Design_V1.0
Date: 2019-05-15
Status: Preliminary
www.quectel.com

Advertisement

Table of Contents
loading

Related Manuals for Quectel BG95 Series

Summary of Contents for Quectel BG95 Series

  • Page 1 BG95 Hardware Design LPWA Module Series Rev. BG95_Hardware_Design_V1.0 Date: 2019-05-15 Status: Preliminary www.quectel.com...
  • Page 2 QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION PROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORT TO ENSURE THE QUALITY OF THE INFORMATION IT MAKES AVAILABLE. QUECTEL DOES NOT MAKE ANY WARRANTY AS TO THE INFORMATION CONTAINED HEREIN, AND DOES NOT ACCEPT ANY LIABILITY FOR ANY INJURY, LOSS OR DAMAGE OF ANY KIND INCURRED BY USE OF OR RELIANCE UPON THE INFORMATION.

  • Page 3: About The Document

    LPWA Module Series BG95 Hardware Design About the Document History Revision Date Author Description Lim PENG/ 2019-05-15 Initial Garey XIE BG95_Hardware_Design 2 / 80...

  • Page 4: Table Of Contents

    LPWA Module Series BG95 Hardware Design Contents About the Document ..........................2 Contents ..............................3 Table Index ............................... 5 Figure Index .............................. 7 Introduction ............................8 1.1. Safety Information ........................9 Product Concept ..........................13 2.1. General Description ........................ 13 2.2.
  • Page 5 LPWA Module Series BG95 Hardware Design 3.17. GPIO Interfaces ........................52 GNSS Receiver ..........................54 4.1. General Description ........................ 54 4.2. GNSS Performance ........................ 54 4.3. Layout Guidelines ........................55 Antenna Interfaces .......................... 56 5.1. Main Antenna Interface ......................56 5.1.1.
  • Page 6 BG95 Hardware Design Table Index TABLE 1: VERSION SELECTION FOR BG95 SERIES MODULE ..............13   TABLE 2: FREQUENCY BANDS AND GNSS TYPES OF BG95 SERIES MODULE ........13   TABLE 3: KEY FEATURES OF BG95 SERIES MODULES ................16  ...
  • Page 7 LPWA Module Series BG95 Hardware Design TABLE 42: DESCRIPTION OF DIFFERENT CODING SCHEMES ..............80   TABLE 43: GPRS MULTI-SLOT CLASSES ...................... 81   TABLE 44: EDGE MODULATION AND CODING SCHEMES ................83   BG95_Hardware_Design 6 / 80...
  • Page 8 LPWA Module Series BG95 Hardware Design Figure Index FIGURE 1: FUNCTIONAL DIAGRAM ....................... 18   FIGURE 2: PIN ASSIGNMENT (TOP VIEW) ....................21   FIGURE 3: SLEEP MODE APPLICATION VIA UART ..................33   FIGURE 4: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ............. 34  ...

  • Page 9: Introduction

    LPWA Module Series BG95 Hardware Design Introduction This document defines BG95 module and describes its air interface and hardware interfaces which are connected with customers’ applications. This document can help customers quickly understand the interface specifications, electrical and mechanical details, as well as other related information of BG95. To facilitate its application in different fields, reference design is also provided for customers’...

  • Page 10: Safety Information

    BG95. Manufacturers of the cellular terminal should send the following safety information to users and operating personnel, and incorporate these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for customers’ failure to comply with these precautions.
  • Page 11 LPWA Module Series BG95 Hardware Design 1.2. FCC Certification Requirements. According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a mobile device. And the following conditions must be met: 1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna installation and operating configurations of this transmitter, including any applicable source-based time- averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements of 2.1091.
  • Page 12 LPWA Module Series BG95 Hardware Design LTE Band71:≤11.687 dBi ❒NB 5. This module must not transmit simultaneously with any other antenna or transmitter 6. The host end product must include a user manual that clearly defines operating requirements and conditions that must be observed to ensure compliance with current FCC RF exposure guidelines. For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is required to satisfy the SAR requirements of FCC Part 2.1093 If the device is used for other equipment that separate approval is required for all other operating...
  • Page 13 LPWA Module Series BG95 Hardware Design The final host / module combination may also need to be evaluated against the FCC Part 15B criteria for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device. The user’s manual or instruction manual for an intentional or unintentional radiator shall caution the user that changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to operate the equipment.

  • Page 14: Product Concept

    VoLTE Positioning (Optional) BG95-M1 BG95-M2* BG95-M3* BG95-N1* BG95-M4 BG95-M5 BG95-MF Table 2: Frequency Bands and GNSS Types of BG95 Series Module Module Supported Bands LTE Bands Power Class GNSS (Optional) Cat M1 Only: LTE-FDD: GPS, B1/B2/B3/B4/B5/B8/B12/B13/ Power Class 5 (20dBm)
  • Page 15 LPWA Module Series BG95 Hardware Design Cat M1: LTE-FDD: B1/B2/B3/B4/B5/B8/B12/B13/ B14/B18/B19/B20/B25/B26*/ GPS, B27/B28/B66/B85 Power Class 5 (20dBm) GLONASS, BeiDou, BG95-M2* Cat NB2: Galileo LTE-FDD: B1/B2/B3/B4/B5/B8/B12/B13/ B18/B19/B20/B25/B26*/B28/B66/ B71/B85 Cat M1: LTE-FDD: B1/B2/B3/B4/B5/B8/B12/B13/ B14/B18/B19/B20/B25/B26*/B27/ B28/B66/B85 GPS, Cat NB2: Power Class 5 (20dBm) GLONASS, BeiDou, BG95-M3* LTE-FDD:...

  • Page 16: Key Features

    2.4GHz/5GHz NOTES GNSS function is optional. BG95 series module supports VoLTE (Voice over LTE) under LTE Cat M1 and CS voice under GSM. LTE Cat NB2 is backward compatible with LTE Cat NB1. BG95-M4/-M5/-MF are still under planning. Therefore, details of them are currently not included and will be added in a future release of this document.
  • Page 17 LPWA Module Series BG95 Hardware Design Table 3: Key Features of BG95 Series Modules Features Details BG95-M1/-M2/-N1:  Supply voltage: 2.4V~4.8V  Typical supply voltage: 3.3V Power Supply BG95-M3:  Supply voltage: 3.3V~4.3V  Typical supply voltage: 3.8V Class 5 (20dBm±2dB) for LTE-FDD bands Class 4 (33dBm±2dB) for GSM850...
  • Page 18  Used for GNSS data and NMEA sentences output  115200bps baud rate by default 3GPP TS 27.007 and 3GPP TS 27.005 AT commands, as well as Quectel AT Commands enhanced AT commands Network Indication One NETLIGHT pin for network connectivity status indication...

  • Page 19: Functional Diagram

    LPWA Module Series BG95 Hardware Design are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like might reduce in their value and exceed the specified tolerances. When the temperature returns to the normal operating temperature levels, the module will meet 3GPP specifications again.

  • Page 20: Evaluation Board

    4. “*” means under development. 2.4. Evaluation Board In order to help customers to develop applications conveniently with BG95, Quectel supplies the evaluation board (EVB), USB to RS-232 converter cable, USB data cable, earphone, antenna and other peripherals to control or test the module. For more details, please refer to document [1].

  • Page 21: Application Interfaces

    LPWA Module Series BG95 Hardware Design Application Interfaces BG95 is equipped with 102 LGA pads that can be connected to customers’ cellular application platforms. The following sub-chapters will provide detailed description of interfaces listed below:  Power supply  (U)SIM interface ...

  • Page 22: Pin Assignment

    LPWA Module Series BG95 Hardware Design 3.1. Pin Assignment The following figure shows the pin assignment of BG95. PSM_IND* ANT_GNSS ADC1 USIM_GND PCM_CLK* USIM_CLK PCM_SYNC* USIM_DATA PCM_IN* USIM_RST PCM_OUT* USIM_VDD GPIO64 USIM_PRESENCE* USB_VBUS USB_DP GPIO65 I2C_SDA* I2C_SCL* USB_DM GPIO66 USB_BOOT RESERVED RESERVED RESERVED...

  • Page 23: Pin Description

    LPWA Module Series BG95 Hardware Design NOTES ADC0 and ADC1 cannot be used simultaneously. BG95 supports using of only one ADC interface at a time: either ADC0 or ADC1. Currently only ADC0 is enabled, and ADC1 will be enabled in the next hardware design version.
  • Page 24 LPWA Module Series BG95 Hardware Design Table 5: Pin Description Power Supply Pin Name Pin No. Description DC Characteristics Comment BG95-M1/-M2/-N1: Vmax=4.8V Vmin=2.4V Power supply Vnorm=3.3V VBAT_BB 32, 33 for the module’s baseband part BG95-M3: Vmax=4.3V Vmin=3.3V Vnorm=3.8V BG95-M1/-M2/-N1: Vmax=4.8V Vmin=2.4V Power supply Vnorm=3.3V...
  • Page 25 LPWA Module Series BG95 Hardware Design never be pulled down to GND permanently. Reset Pin Name Pin No. Description DC Characteristics Comment RESET_N will be Reset the supported in the next RESET_N max=0.45V module hardware design version. Status Indication Pin Name Pin No.
  • Page 26 LPWA Module Series BG95 Hardware Design (U)SIM card min=1.35V min=-0.3V max=0.6V Data signal of min=1.2V USIM_DATA (U)SIM card max=2.0V max=0.45V min=1.35V Clock signal of max=0.45V USIM_CLK (U)SIM card min=1.35V Specified USIM_GND ground for (U)SIM card Main UART Interface Pin Name Pin No.
  • Page 27 LPWA Module Series BG95 Hardware Design Pin Name Pin No. Description DC Characteristics Comment min=-0.3V 1.8V power domain. max=0.6V DBG_RXD Receive data If unused, keep this min=1.2V pin open. max=2.0V 1.8V power domain. max=0.45V DBG_TXD Transmit data If unused, keep this min=1.35V pin open.
  • Page 28 LPWA Module Series BG95 Hardware Design pin open. External pull-up I2C serial data. resistor is required. I2C_SDA* Used for 1.8V only. external codec. If unused, keep this pin open. Antenna Interfaces Pin Name Pin No. Description DC Characteristics Comment Main antenna ANT_MAIN 50Ω...
  • Page 29 LPWA Module Series BG95 Hardware Design max=0.45V min=1.35V General- 1.8V power domain. min=-0.3V GPIO65 purpose input/ If unused, keep this max=0.6V output interface pin open. min=1.2V max=2.0V max=0.45V min=1.35V General- 1.8V power domain. min=-0.3V GPIO66 purpose input/ If unused, keep this max=0.6V output interface pin open.

  • Page 30: Operating Modes

    LPWA Module Series BG95 Hardware Design min=-0.3V Application 1.8V power domain. max=0.6V AP_READY* processor sleep If unused, keep this min=1.2V state detection pin open. max=2.0V Force the min=-0.3V 1.8V power domain. module to enter max=0.6V USB_BOOT If unused, keep this into emergency min=1.2V pin open.

  • Page 31: Power Saving

    LPWA Module Series BG95 Hardware Design Table 6: Overview of Operating Modes Mode Details Network has been connected. In this mode, the power consumption Connected may vary with the network setting and data transfer rate. Normal Operation Software is active. The module remains registered on network, and it Idle is ready to send and receive data.

  • Page 32: Power Saving Mode (Psm)

    LPWA Module Series BG95 Hardware Design Hardware: W_DISABLE#* is pulled up by default. Driving it to low level will let the module enter into airplane mode. Software: AT+CFUN=<fun> provides choice of the functionality level, through setting <fun> into 0, 1 or 4. ...

  • Page 33: Extended Idle Mode Drx (E-I-Drx)

    LPWA Module Series BG95 Hardware Design 3.4.3. Extended Idle Mode DRX (e-I-DRX) The module (UE) and the network may negotiate over non-access stratum signalling the use of e-I-DRX for reducing its power consumption, while being available for mobile terminating data and/or network originated procedures within a certain delay dependent on the DRX cycle value.

  • Page 34: Power Supply

    LPWA Module Series BG95 Hardware Design Figure 3: Sleep Mode Application via UART  When BG95 has URC to report, RI signal will wake up the host. Please refer to Chapter 3.14 for details about RI behavior.  Driving the host DTR to low level will wake up the module. ...

  • Page 35: Decrease Voltage Drop

    LPWA Module Series BG95 Hardware Design Table 7: VBAT and GND Pins Pin Name Pin No. Description Module Min. Typ. Max. Unit BG95-M1/-M2/-N1 Power supply for the VBAT_RF 52, 53 module’s RF part BG95-M3 Power supply for the BG95-M1/-M2/-N1 VBAT_BB 32, 33 module’s baseband BG95-M3...

  • Page 36: Monitor The Power Supply

    LPWA Module Series BG95 Hardware Design a single voltage source and can be expanded to two sub paths with star structure. The width of VBAT_BB trace should be no less than 0.5mm, and the width of VBAT_RF trace should be no less than 2mm. In principle, the longer the VBAT trace is, the wider it will be.
  • Page 37 LPWA Module Series BG95 Hardware Design Table 8: Pin Definition of PWRKEY Pin Name Pin No. Description DC Characteristics Comment The output voltage is Vnorm=1.5V 1.5V because of the PWRKEY Turn on/off the module max=0.45V diode drop in the Qualcomm chipset. When BG95 is in power off mode, it can be turned on to normal mode by driving the PWRKEY pin to a low level for a duration between 500ms and 1000ms.

  • Page 38: Turn Off Module

    LPWA Module Series BG95 Hardware Design NOTE VBA T 500ms~1000ms ≤0.45V PWRKEY RESET_N STATUS (DO) Typ. 2s Inactive Active Typ. 2s UART Inactive Active Figure 8: Timing of Turning on Module NOTES 1. Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than 30ms.

  • Page 39: Turn Off Module Using At Command

    LPWA Module Series BG95 Hardware Design The power-down scenario is illustrated in the following figure. VBA T 650ms~150 0ms PWRKEY ≤0.45V STATUS Module Power-down procedure RUNNING Status Figure 9: Timing of Turning off Module 3.6.2.2. Turn off Module Using AT Command It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the module via PWRKEY pin.
  • Page 40 LPWA Module Series BG95 Hardware Design VBA T ≤3.8s ≥2s RESET_N ≤0.45V Module Running Resetting Restart Status Figure 10: Timing of Reset Module The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button can be used to control the RESET_N pin. RESET_N 2s~3.8s 4.7K...

  • Page 41: U)Sim Interface

    LPWA Module Series BG95 Hardware Design NOTE Please assure that there is no large capacitance on RESET_N pin. 3.8. (U)SIM Interface The (U)SIM interface circuitry meets ETSI and IMT-2000 requirements. BG95 supports 1.8V (U)SIM card only. Table 10: Pin Definition of (U)SIM Interface Pin Name Pin No.
  • Page 42 LPWA Module Series BG95 Hardware Design Figure 13: Reference Circuit of (U)SIM Interface with an 8-Pin (U)SIM Card Connector If (U)SIM card detection function is not needed, please keep USIM_PRESENCE* unconnected. A reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following figure.

  • Page 43: Usb Interface

    LPWA Module Series BG95 Hardware Design  Assure the ground between the module and the (U)SIM card connector short and wide. Keep the trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential. Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1uF, and place it as close to (U)SIM card connector as possible.
  • Page 44 LPWA Module Series BG95 Hardware Design The USB interface is recommended to be reserved for firmware upgrade in customers’ designs. The following figure shows a reference circuit of USB interface. Figure 15: Reference Circuit of USB Interface A common mode choke L1 is recommended to be added in series between the module and customer’s MCU in order to suppress EMI spurious transmission.

  • Page 45: Uart Interfaces

    LPWA Module Series BG95 Hardware Design 3.10. UART Interfaces The module provides three UART interfaces: Main UART, Debug UART and GNSS UART interfaces. Features of them are illustrated below:  The Main UART interface supports 9600bps, 19200bps, 38400bps, 57600bps, 115200bps, 230400bps, 460800bps and 921600bps baud rates, and the default is 115200bps.
  • Page 46 LPWA Module Series BG95 Hardware Design Table 13: Pin Definition of Debug UART Interface Pin Name Pin No. Description Comment DBG_RXD Receive data 1.8V power domain DBG_TXD Transmit data 1.8V power domain Table 14: Pin Definition of GNSS UART Interface Pin Name Pin No.
  • Page 47 LPWA Module Series BG95 Hardware Design VDD_EXT VCCA VCCB VDD_MCU 0.1uF 0.1uF 120K RI_MCU DCD_MCU Translator CTS_MCU RTS_MCU DTR_MCU TXD_MCU RXD_MCU Figure 16: Reference Circuit with Translator Chip Please visit http://www.ti.com for more information. Another example with transistor translation circuit is shown as below. The circuit design of dotted line section can refer to that of solid line section, in terms of both module input and output circuit designs, but please pay attention to the direction of connection.

  • Page 48: Pcm* And I2C* Interfaces

    LPWA Module Series BG95 Hardware Design 3.11. PCM* and I2C* Interfaces BG95 provides one Pulse Code Modulation (PCM) digital interface and one I2C interface. The following table shows the pin definition of the two interfaces which can be applied on audio codec design. Table 16: Pin Definition of PCM and I2C Interfaces Pin Name Pin No.

  • Page 49: Network Status Indication

    LPWA Module Series BG95 Hardware Design 3.12. Network Status Indication BG95 provides one network status indication pin: NETLIGHT. The pin is used to drive a network status indication LED. The following tables describe the pin definition and logic level changes of NETLIGHT in different network activity status.

  • Page 50: Status

    LPWA Module Series BG95 Hardware Design 3.13. STATUS The STATUS pin is used to indicate the operation status of BG95 module. It will output high level when the module is powered on. The following table describes the pin definition of STATUS. Table 19: Pin Definition of STATUS Pin Name Pin No.

  • Page 51: Usb_Boot Interface

    LPWA Module Series BG95 Hardware Design Table 20: Default Behaviors of RI State Response Idle RI keeps in high level. RI outputs 120ms low pulse when new URC returns. The default RI behaviors can be configured flexibly by AT+QCFG=“urc/ri/ring” command. For more details about AT+QCFG*, please refer to document [2].

  • Page 52: Adc Interfaces

    LPWA Module Series BG95 Hardware Design Figure 21: Reference Circuit of USB_BOOT Interface NOTE It is recommended to reserve the above circuit design during application design. 3.16. ADC Interfaces The module provides two analog-to-digital converter (ADC) interfaces but only one ADC interface can be used for each time.

  • Page 53: Gpio Interfaces

    LPWA Module Series BG95 Hardware Design Table 23: Characteristics of ADC Interfaces Parameter Min. Typ. Max. Unit ADC0/ADC1 Voltage Range ADC0/ADC1 Resolution 64.979 ADC0/ADC1 Sampling Rate NOTES ADC0 and ADC1 cannot be used simultaneously. BG95 supports using of only one ADC interface at a time: either ADC0 or ADC1.
  • Page 54 LPWA Module Series BG95 Hardware Design The following table describes the characteristics of GPIO interfaces. Table 25: Logic Levels of GPIO Interfaces Parameter Min. Max. Unit -0.3 0.45 1.35 NOTE “*” means under development. BG95_Hardware_Design 53 / 80...

  • Page 55: Gnss Receiver

    LPWA Module Series BG95 Hardware Design GNSS Receiver 4.1. General Description BG95 includes a fully integrated global navigation satellite system solution that supports Gen9 VT of Qualcomm (GPS, GLONASS, BeiDou and Galileo). BG95 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via USB interface by default.

  • Page 56: Layout Guidelines

    LPWA Module Series BG95 Hardware Design Autonomous Hot start @open sky XTRA enabled Accuracy Autonomous CEP-50 (GNSS) @open sky NOTES Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep on positioning for 3 minutes. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can fix position again within 3 minutes after loss of lock.

  • Page 57: Antenna Interfaces

    LPWA Module Series BG95 Hardware Design Antenna Interfaces BG95 includes a main antenna interface and a GNSS antenna interface. The antenna ports have an impedance of 50Ω. 5.1. Main Antenna Interface 5.1.1. Pin Definition The pin definition of main antenna interface is shown below. Table 27: Pin Definition of Main Antenna Interface Pin Name Pin No.

  • Page 58: Reference Design Of Rf Antenna Interface

    LPWA Module Series BG95 Hardware Design LTE-FDD B13 777~787 746~756 LTE-FDD B14 788~798 758~768 LTE-FDD B18 815~830 860~875 LTE-FDD B19 830~845 875~890 LTE-FDD B20 832~862 791~821 LTE-FDD B25 1850~1915 1930~1995 LTE-FDD B26* 814~849 859~894 LTE-FDD B27 807~824 852~869 LTE-FDD B28 703~748 758~803 LTE-TDD B66...

  • Page 59: Reference Design Of Rf Layout

    LPWA Module Series BG95 Hardware Design Figure 22: Reference Circuit of RF Antenna Interface 5.1.4. Reference Design of RF Layout For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. The impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant, the distance between signal layer and reference ground (H), and the clearance between RF trace and ground (S).
  • Page 60 LPWA Module Series BG95 Hardware Design Figure 24: Coplanar Waveguide Line Design on a 2-layer PCB Figure 25: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 3 as Reference Ground) Figure 26: Coplanar Waveguide Line Design on a 4-layer PCB (Layer 4 as Reference Ground) BG95_Hardware_Design 59 / 80...

  • Page 61: Gnss Antenna Interface

    LPWA Module Series BG95 Hardware Design In order to ensure RF performance and reliability, the following principles should be complied with in RF layout design:  Use impedance simulation tool to control the characteristic impedance of RF traces as 50Ω. ...

  • Page 62: Antenna Installation

    LPWA Module Series BG95 Hardware Design Figure 27: Reference Circuit of GNSS Antenna Interface NOTES An external LDO can be selected to supply power according to the active antenna requirement. If the module is designed with a passive antenna, then the VDD circuit is not needed. 5.3.

  • Page 63: Recommended Rf Connector For Antenna Installation

    LPWA Module Series BG95 Hardware Design Cable Insertion Loss: < 1dB (LTE B5/B8/B12/B13/B14 /B18/B19/B20/B26*/B27 /B28/B71 / B85, GSM850/EGSM900) Cable Insertion Loss: < 1.5dB (LTE B1/B2/B3/B4/B25/B66, DCS1800/PCS1900) NOTES It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of active antenna may generate harmonics which will affect the GNSS performance.
  • Page 64 LPWA Module Series BG95 Hardware Design Figure 29: Mechanicals of U.FL-LP Connectors The following figure describes the space factor of mated connector. Figure 30: Space Factor of Mated Connector (Unit: mm) For more details, please visit http://www.hirose.com. BG95_Hardware_Design 63 / 80...

  • Page 65: Electrical, Reliability And Radio Characteristics

    LPWA Module Series BG95 Hardware Design Electrical, Reliability and Radio Characteristics 6.1. Absolute Maximum Ratings Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are listed in the following table. Table 32: Absolute Maximum Ratings Parameter Min.

  • Page 66: Operation And Storage Temperatures

    LPWA Module Series BG95 Hardware Design current (during control level on transmission slot) EGSM900 BG95-M1/ BG95-M2/ USB_VBUS USB detection 5.25 BG95-N1/ BG95-M3 6.3. Operation and Storage Temperatures The operation and storage temperatures of the module are listed in the following table. Table 34: Operation and Storage Temperatures Parameter Min.

  • Page 67: Rf Receiving Sensitivity

    LPWA Module Series BG95 Hardware Design Table 35: BG95 RF Output Power Frequency Max. Min. LTE-FDD B1/B2/B3/B4/B5/B8/B12/B13/B14 /B18/B19/B20/B25/ 20dBm±2dB <-39dBm B26*/B27 /B28/B66/B71 /B85 GSM850/EGSM900 33dBm±2dB 5dBm±5dB DCS1800/PCS1900 30dBm±2dB 0dBm±5dB GSM850/EGSM900 (8-PSK) 27dBm±3dB 5dBm±5dB DCS1800/PCS1900 (8-PSK) 26dBm±3dB 0dBm±5dB NOTES LTE-FDD B14 and B27 are supported by Cat M1 only. LTE-FDD B71 is supported by Cat NB2 only.

  • Page 68: Electrostatic Discharge

    LPWA Module Series BG95 Hardware Design LTE-FDD B13 TBD /-99.3 TBD/-107.5 LTE-FDD B14 TBD /-99.3 LTE-FDD B18 TBD /-102.3 TBD/-107.5 LTE-FDD B19 TBD /-102.3 TBD/-107.5 LTE-FDD B20 TBD /-99.8 TBD/-107.5 LTE-FDD B25 TBD /-100.3 TBD/-107.5 LTE-FDD B26* TBD /-100.3 TBD/-107.5 LTE-FDD B27 TBD /-100.8 LTE-FDD B28...
  • Page 69 LPWA Module Series BG95 Hardware Design Table 37: Electrostatic Discharge Characteristics (25ºC, 45% Relative Humidity) Tested Points Contact Discharge Air Discharge Unit VBAT, GND Main/GNSS Antenna Interfaces BG95_Hardware_Design 68 / 80...

  • Page 70: Mechanical Dimensions

    LPWA Module Series BG95 Hardware Design Mechanical Dimensions This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm, and the tolerances for dimensions without tolerance values are ±0.05mm. 7.1. Mechanical Dimensions of the Module 19.90±0.15 2.2±0.2 Pin 1 Figure 31: Module Top and Side Dimensions...
  • Page 71 LPWA Module Series BG95 Hardware Design 19.90±0.15 7.45 7.15 1.00 1.95 1.10 0.55 1.10 0.20 1.00 0.20 Pin 1 5.10 1.00 0.85 1.70 1.90 1.10 1.00 1.70 0.70 1.00 1.70 0.50 1.15 0.20 0.55 0.20 40x1.0 62x0.7 62x1.15 40x1.0 Figure 32: Module Bottom Dimensions (Bottom View) BG95_Hardware_Design 70 / 80...

  • Page 72: Recommended Footprint

    LPWA Module Series BG95 Hardware Design 7.2. Recommended Footprint 19.90±0.15 9.18 9.18 7.45 7.15 1.00 1.10 1.95 0.55 1.10 0.20 1.00 0.20 5.10 Pin 1 2.55 2.55 1.00 1.70 0.85 0.15 1.90 0.85 1.10 0.85 0.85 1.00 0.70 1.70 0.50 1.00 1.15 0.20...

  • Page 73: Design Effect Drawings Of The Module

    7.3. Design Effect Drawings of the Module Figure 34: Top View of the Module Figure 35: Bottom View of the Module NOTE These are renderings of BG95 module. For authentic appearance, please refer to the module that you receive from Quectel. BG95_Hardware_Design 72 / 80...

  • Page 74: Storage, Manufacturing And Packaging

    LPWA Module Series BG95 Hardware Design Storage, Manufacturing and Packaging 8.1. Storage BG95 is stored in a vacuum-sealed bag. It is rated at MSL 3, and its storage restrictions are listed below. 1. Shelf life in the vacuum-sealed bag: 12 months at <40ºC/90%RH. 2.

  • Page 75: Manufacturing And Soldering

    LPWA Module Series BG95 Hardware Design 8.2. Manufacturing and Soldering Push the squeegee to apply the solder paste on the surface of stencil, thus making the paste fill the stencil openings and then penetrate to the PCB. The force on the squeegee should be adjusted properly so as to produce a clean stencil surface on a single pass.

  • Page 76: Packaging

    LPWA Module Series BG95 Hardware Design Reflow Zone Max slope 2 to 3°C/sec Reflow time (D: over 220°C) 40 to 60 sec Max temperature 238°C ~ 245°C Cooling down slope 1 to 4°C/sec Reflow Cycle Max reflow cycle 8.3. Packaging BG95 is packaged in a vacuum-sealed bag which is ESD protected.
  • Page 77 LPWA Module Series BG95 Hardware Design DETAIL:A DETAIL:A Figure 38: Reel Dimensions Table 39: Reel Packaging Model Name MOQ for MP Minimum Package: 250pcs Minimum Package x 4=1000pcs Size: 370mm × 350mm × 56mm Size: 380mm × 250mm × 365mm BG95 250pcs N.W: 0.61kg...

  • Page 78: Appendix A References

    LPWA Module Series BG95 Hardware Design Appendix A References Table 40: Related Documents Document Name Remark Quectel_UMTS&LTE_EVB_User_Guide UMTS&LTE EVB User Guide Quectel_BG95_AT_Commands_Manual BG95 AT Commands Manual Quectel_BG95_GNSS_AT_Commands_Manual BG95 GNSS AT Commands Manual Quectel_RF_Layout_Application_Note RF Layout Application Note Quectel_Module_Secondary_SMT_User_Guide Module Secondary SMT User Guide Table 41: Terms and Abbreviations Abbreviation Description...
  • Page 79 LPWA Module Series BG95 Hardware Design Electrostatic Discharge Frequency Division Duplex Full Rate GMSK Gaussian Minimum Shift Keying Global System for Mobile Communications Home Subscriber Server Input/Output Inorm Normal Current Light Emitting Diode Low Noise Amplifier Long Term Evolution Mobile Originated Mobile Station (GSM engine) Mobile Terminated Password Authentication Protocol...
  • Page 80 LPWA Module Series BG95 Hardware Design Transmitting Direction Uplink User Equipment Unsolicited Result Code (U)SIM (Universal) Subscriber Identity Module Vmax Maximum Voltage Value Vnorm Normal Voltage Value Vmin Minimum Voltage Value Maximum Input High Level Voltage Value Minimum Input High Level Voltage Value Maximum Input Low Level Voltage Value Minimum Input Low Level Voltage Value Absolute Maximum Input Voltage Value...

  • Page 81: Appendix B Gprs Coding Schemes

    LPWA Module Series BG95 Hardware Design Appendix B GPRS Coding Schemes Table 42: Description of Different Coding Schemes CS-1 CS-2 CS-3 CS-4 Scheme Code Rate Pre-coded USF Radio Block excl.USF and BCS Tail Coded Bits Punctured Bits 9.05 13.4 15.6 21.4 Data Rate Kb/s BG95_Hardware_Design...

  • Page 82: Appendix C Gprs Multi-Slot Classes

    LPWA Module Series BG95 Hardware Design Appendix C GPRS Multi-slot Classes Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot classes are product dependent, and determine the maximum achievable data rates in both the uplink and downlink directions.
  • Page 83 LPWA Module Series BG95 Hardware Design BG95_Hardware_Design 82 / 80...

  • Page 84: Appendix D Edge Modulation And Coding Schemes

    LPWA Module Series BG95 Hardware Design Appendix D EDGE Modulation and Coding Schemes Table 44: EDGE Modulation and Coding Schemes Coding Modulation Coding Family 1 Timeslot 2 Timeslot 4 Timeslot Schemes CS-1 GMSK 9.05kbps 18.1kbps 36.2kbps CS-2 GMSK 13.4kbps 26.8kbps 53.6kbps CS-3 GMSK...

This manual is also suitable for:

Bg95-m1Bg95-m2Bg95-m3Bg95-n1Bg95-m4Bg95-m5 ... Show all

Table of Contents