Quectel BG95 A-GL Series Hardware Design page 42

Drive PON_TRIG high and then drive PWRKEY low after VBAT is stable for 100–200 ms, the module will
be turned on immediately. The power-up timing is shown below.
Figure 13: Power-up Timing (After VBAT is Stable for 100–200 ms)
.
NOTE
1. Ensure that VBAT is stable for 100–200 ms before pulling down PWRKEY.
2. Before you turn on the module by driving PWRKEY low for 500–1000 ms, drive PON_TRIG high,
otherwise, the main UART interface will be inaccessible.
Drive PON_TRIG high and then drive PWRKEY low after VBAT is stable for more than 250 ms, the
module will be turned on immediately. The power-up timing is shown below.
BG95xA-GL_Hardware_Design
LPWA Module Series
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