Control And Indication Interfaces - Quectel EM160R-GL Hardware Design

Lte-a module
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FULL_CARD_POWER_OFF#(H)
NOTE:
PEWAKE# may be pulled up before or after PERST# is pulled up, depending on when HOST pulls up PERST#. This time does not
affect the normal operation of the module and can be ignored.
Table 14: Exit D3
State Timing of the Module
cold
Symbol
Min.
T
50 ms
exit

3.8. Control and Indication Interfaces

Table 15: Pin Definition of Control and Indication Interfaces
Pin Name
WWAN_LED#
WAKE_ON_WAN#
W_DISABLE1#
W_DISABLE2#*
DPR
EM160R-GL_Hardware_Design
VCC(H)
RESET#(H)
PEWAKE#
PERST#
D0
Module State
Figure 16: PCIe D3
Typ.
Max.
150 ms
500 ms
Pin No.
I/O
10
OD
23
OD
8
DI, PU
26
DI, PU
25
DI
D3
D3
hot
State Timing
Cold
Comment
The period from the module pulling down
PEWAKE# to HOST pulling up PERST#.
Description
RF status indication LED
Wake up the host
Airplane mode control
GNSS enable control
Dynamic power reduction
LTE-A Module Series
NOTE
T
exit
D0
cold
Comment
Active low.
Active low.
Active low.
Active low.
Active low.
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