Quectel BG95 A-GL Series Hardware Design page 56

Lpwa module
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LPWA Module Series
If unused, keep them open.
GNSS_RXD
28
DI
GNSS UART reception
NOTE
AT+IPR can be used to set the baud rate of the main UART interface, and AT+IFC can be used to
enable/disable the hardware flow control (the function is disabled by default). See document [3] for more
details about these AT commands.
The module features 1.8 V UART interfaces. A level-shifting circuit should be used if your application has
a 3.3 V UART interface. It is recommended to use a level-shifting chip without internal pull-up. The
voltage-level translator TXB0108PWR manufactured by Texas Instruments is recommended.
The following figure shows a reference design of the main UART interface:
Figure 26: Main UART Reference Design (Translator Chip)
Visit http://www.ti.com for more information.
Another example with a transistor circuit is shown below. For the design of circuits shown in dotted lines,
see that of circuits in solid lines, but pay attention to the direction of connection.
BG95xA-GL_Hardware_Design
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