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Figure 4-4 The Segment Register and the Descriptor Tables
TSS command. The PICE system returns an error if you choose a selector beyond the range of
the GDT or one that points to an entry in the GDT that is not a TSSD.
Interrupts
The 80286 contains an interrupt descriptor table (IDT) that defines up to 256 interrupts. The
interrupt descriptor table register (IDTR) contains the base address and the limit of the IDT.
The relationship between the IDT and the IDTR is the same as the relationship between the
GDT and the GDTR.
Address Protection
The LDT descriptors and the segment descriptors contain access bits. Two of these bits identify
the descriptor protection level (the DPL). There are four protection levels: 0, 1, 2, 3. Level 0
has the most privilege, 3 the least.
The PICE™ System Personality Modules (Probes)
G L O B A L D T
1470
4-17
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