Intel l2ICE User Manual page 121

* PRINT
in s t r u c t io n s n e w e s t s
FRAME ADR
3F5 0DA3FEH
3Fb 0Dfl3FFH
3FA Q0fl4D3H
3FA 0DA403H
00FC00H- DU-AB12H
3FC 00A4D4H
Figure 3-3 Sample Trace Buffer Display in INSTRUCTIONS Mode
The next example looks at the last 16 cycles in the trace buffer (see Figure 3-4).
The following example modifies the MOV instruction so that the write is to the odd address
0FC01H.
*SYTE 33K LENGTH 3 - 0A3,1,0FC
*ASM 33K
□ 0A40DH
The following example defines a system register called odd. This register specifies a break
when the data bus contains the value 12ABH.
* DEFINE SYSREG odd * WRITE IS 12AB
*GG FROM 32K USING odd
Probe □ stopped at location DfiDD:04D4H because of bus break
Break register is ODD
The following example looks at the trace buffer in INSTRUCTIONS mode and then in CY­
CLES mode (see Figure 3-5). Note that because you have written to an odd address, two write
cycles occurred and the bytes on the bus are reversed.
Introduction to Using the PICE™ System
BYTE MNEMONICS
I D
=10
A300FC
10
ID
for Emulation with the System Register EVEN
A301FC
OPERANDS
NOP
NOP
MOV WORD PTR 0FC00H-.AX
NOP
NOP
MOV bJORD PTR 0FC01H-,AX
Trace Buffer Overflow
UNIT 0
3-45