Dual Ethernet Interfaces; Ide Hard Drive; Serial I/O; Interrupts - Intel NetStructure ZT 5515 Product Specification

Introduction
2.3.10
2.3.11
2.3.12
Note: COM1 signals are available to the front- and rear-panel simultaneously. Utilizing the COM1 signal
2.3.13
16
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See Section D.2, "Ethernet" on page 83
specification.

Dual Ethernet Interfaces

The ZT 5515 provides two 10/100/1000BaseTx Ethernet channels (ENET A and ENET B) through
the Intel 82546EB Fast Gigabit Ethernet Multifunction PCI Controller. The 82546EB consists of
both the Media Access Controller (MAC) and the physical layer (PHY) interface combined into a
single component solution. One RJ-45 connector is available on the front panel faceplate and two
Ethernet Channels can be directed to the rear connector at J3 (software selectable in the BIOS). See
Section C.1.6, "Geographic Addressing (E4h)" on page 81
See Section D.2, "Ethernet" on page 83
the ZT 5515.

IDE Hard Drive

The ZT 5515A-1B includes an on-board 2.5-inch Enhanced IDE hard drive. The hard drive is on
the ZT 5515's primary IDE channel and is assigned "device 0" (master) identity.
See Chapter 7, "IDE Controller,"

Serial I/O

The ZT 5515 provides support for two RS-232 compatible serial ports. COM1 is accessible at the
faceplate through an RJ-45 connector or through the J5 Rear Panel I/O connector. This port is
typically used for test access. Both COM1 and COM2 are available at the J5 Rear Panel I/O
connector. No strapping option or software control is required to use either port.
The front panel serial port is available via a RJ-45 connector and is configured as DTE. SRI (Serial
Ring Indicator) and SCD (Serial Carrier Detect) signals are not included in the front panel RJ-45
connector. See Section 30, "J30 COM1 Serial Port Pinout" on page 70
at the front and rear at the same time will cause a signaling conflict.
The ZT 5515's serial controller resides in the National Semiconductor
See Section D.6, "SuperI/O" on page 84

Interrupts

Two enhanced, 8259-style interrupt controllers provide the ZT 5515 with a total of 15 interrupt
inputs. Interrupt controller features include support for:
•
Level-triggered and edge-triggered inputs
•
Individual input masking
•
Fixed and rotating priorities
Interrupt sources include:
•
Counter/Timers
®
TM
Intel NetStructure ZT 5515 Compute Processor Board Technical Product Specification
for a link to the sponsoring organization for the PMC
for more information.
for links to the datasheets for the Ethernet devices used on
for more information.
for a link to the datasheet for this device.
for a connector pinout.
* *
PC87417 SuperI/O device.