Intel l2ICE User Manual page 137

Integrated instrumentation and in-circuit emulation system
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The SYNC START/ Test Point
The SYNC START/ test point is a TTL input that is normally high. When SYNC START/ is
low and the probe enters emulation, READY is held low, and the probe undergoes a READY
hang after the first instruction fetch. You can cause this hang by holding SYNC START/ low.
To synchronize the probes in a multi-probe system, first set MEMRDY to FALSE in each
probe. This prevents a memory time-out from occurring during the first instruction fetch.
Then, keep SYNC START/ on each probe low. Ensure that SYNC START/ for each probe
goes high at the same time. This raises READY, gets rid of the READY hang, and ensures that
each probe enters emulation at the same time.
A typical application is to connect all the SYNC START/ test points to one of the clipsout lines.
This allows you to control the state of the SYNC START/ signal from the PICE console with
the CLIPSOUT command.
If, while SYNC START/ is low, a coprocessor requests the address and data buses, the
probe's microprocessor will not acknowledge that request until you raise SYNC
START/. This is important if the coprocessor is performing a time-critical operation.
You may also find SYNC START/ useful in a single probe system because it gives you hard­
ware control over when the probe enters emulation. SYNC START/ must be high for emula­
tion to begin.
The 87 INT Test Point
The 87 INT test point is a TTL output. An internal 8087 coprocessor asserts this signal. When
high, this signal indicates that an unmasked exception has occurred during internal 8087 in­
struction execution when 8087 interrupts are enabled.
The PICE™ System Personality Modules (Probes)
Figure 4-1 Ready Signal Set-Up Time
NOTE
4-5

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