Table 7-7: Memw# Timing (Non-68000); Figure 16: Memw# Timing (Non-68000) - Epson SED1352 Technical Manual

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MEMW# Timing
AB[19:0]
BHE#
MEMCS#
MEMW#
READY
DB[15:0]
Symbol
AB[19:0], BHE# and MEMCS# valid before MEMW#
t1
falling edge
AB[19:0], BHE# and MEMCS# hold from MEMW#
t2
rising edge
t3
MEMW# falling edge to READY falling edge
t4
MEMW# falling edge to DB[15:0] valid
t5
DB[15:0] hold from MEMW# rising edge
t6
READY negated pulse width
Where MCLK period = 1/f
SED1352
X16-SP-001-16
VALID
t1
t3
Hi-Z
Hi-Z
t4

Figure 16: MEMW# Timing (Non-68000)

Table 7-7: MEMW# Timing (Non-68000)

Parameter
, or 2/f
, or 4/f
depending on which mode the chip is in. (see section 9.2 and 9.3).
OSC
OSC
OSC
Epson Research and Development
t6
VALID
3V/3.3V
Min
Typ
0
0
0
Vancouver Design Center
t2
Hi-Z
t5
Hi-Z
5V
Max
Min
Typ
Max
0
0
30
20
120
140
0
3.5*
3.5*
MCLK
MCLK
+ 20
+ 10
Hardware Functional Specification
Issue Date: 99/07/28
Unit
s
ns
ns
ns
ns
ns
ns

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