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5.3 Registers
The SED1352 has an internal set of sixteen 8-bit read/write registers which configure it for various modes of operation.
The registers can be accessed in two ways: Indexed Addressing and Direct Addressing.
Note
Refer to the SED1352 Hardware Functional Specification and SDU1352B0x Evaluation Board User's
Manual for more information on the SED1352 registers.
5.3.1 Indexed Addressing
This method requires only two sequential I/O address locations starting from the base I/O address. The base I/O address is
determined by the power-on state of the SRAM data lines VD[4-12]. See Table 5-6 in the SED1352 Hardware Functional
Specification, X16-SP-001-xx.
The two sequential I/O addresses are defined as Index Address and Data. To access registers using this method, an Index
Address must be written to the first I/O address location allowing data to be written/read to/from the second I/O address.
Example 12: Write 12h to register 08h on the SDU1352B0x evaluation board; the base port address is
310h, and indexed port mapping is used.
1.
Write 08h to the index register.
The index register is at base port address + 0 = 310h.
MOV DX,310h
MOV AL,08h
OUT DX,AL
2.
Write 12h to the data register.
The data register is at base port address + 1 = 311h.
MOV DX,311h
MOV AL,12h
OUT DX,AL
5.3.2 Direct Addressing
This method of addressing requires 16 sequential I/O addresses starting from the base I/O address. The base I/O address is
determined by the power-on state of the SRAM data lines VD[7-12]. See Table 5-6 in the SED1352 Hardware Functional
Specification, X16-SP-001-xx.
To access the internal 16 registers of the SED1352, simply perform I/O read/write functions to the absolute address as
defined in the previous paragraph.
SED1352
X16-BG-007-04
Epson Research and Development
Vancouver Design Center
Programming Notes and Examples
Issue Date: 98/10/08
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