Epson SED1352 Technical Manual page 20

GRAPHICS
SED1352
PIN DESCRIPTION
Key
A = Analog
I = Input
O = Output
I/O = Bidirectional
P = Power
Bus Interface
Pin Name Type F0B Pin #
94 - 100, 1,
DB0-DB15 I/O
4 -11
AB0 I 12
AB1-AB19 I 13 - 31
BHE# I 91
IOCS# I 84
IOW# I 85
IOR# I 86
MEMCS# I 87
MEMW# I 88
MEMR# I 89
READY O 90
RESET I 32
14
F1B Pin #
D0B Pad Description
#
91 - 98, These pins are connected to the system data bus. In 8-bit bus mode, DB8-DB15
1 - 8 must be tied to V
In MC68000 MPU interface, this pin is connected to the Upper Data Strobe
9 (UDS#) pin of MC68000. In other bus interfaces, this pin is connected to the
system address bus.
10 - 28 These pins are connected to the system address bus.
In MC68000 MPU interface, this pin is connected to the Lower Data Strobe
88 (LDS#) pin of MC68000. In other bus interfaces, this pin is the Bus High Enable
input for use with 16-bit system. In 8-bit bus mode, tie BHE# input to V
81 Active low input to select one of fifteen internal registers.
In MC68000 MPU interface, this pin is connected to the R/W# pin of MC68000.
This input pin will define whether the data transfer is a read (active high) or write
82
(active low) cycle. In other bus interfaces, this is the active low input to write data
into an internal register.
In MC68000 MPU interface, this pin is connected to the AS# pin of MC68000.
83 This input pin will indicate a valid address is available on the address bus. In other
bus interfaces, this is the active low input to read data from an internal register.
84 Active low input to indicate the attempt to access the display memory.
Active low input to write data to the display memory. This pin should be tied to
85
V in an MC68000 MPU interface.
DD
Active low input to read data from the display memory. This pin should be tied to
86
V in an MC68000 MPU interface.
DD
For MC68000 MPU interface, this pin is connected to the DTACK# pin of
MC68000 and will be driven low when ever a data transfer is complete. In other
bus interfaces, this output is driven low to force the system to insert wait states
87
when needed.
READY is placed in a high-impedance (Hi-Z) state after the transfer is completed.
29 Active high input to force all signals to their inactive states.
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DD
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DD
X16B-C-001-06