Epson SED1352 Technical Manual page 119

Graphics lcd controller
Table of Contents

Advertisement

Epson Research and Development
Vancouver Design Center
AUX[08] Screen 2 Display Start Address Register (LSB)
I/O address = 1000b, Read/Write.
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 7
Bit 6
AUX[09] Screen 2 Display Start Address Register (MSB)
I/O address = 1001b, Read/Write.
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 15
Bit 14
AUX[08] bits 7-0 Screen 2 Display Start Address Bits [15:0]
AUX[09] bits 7-0 These 16 bits determine the Screen 2 Display Start Address. In an 8-bit memory configuration these bits
set the 16-bit start address (i.e., byte access). In a 16-bit memory configuration these are the 16 most sig-
nificant bits of a 17-bit start address (i.e., word access).
In a dual panel configuration, screen 2 refers to the lower half of the display. The Screen 2 Display Start
Address is the memory address corresponding to first displayed pixel in the first line of the lower half of
the display. If Screen 2 is started right after Screen 1, the Screen 2 Display Start Address is calculated with
the following formula.
Screen2DisplayStartAddress hex
(
ImageHorizontalResolution
------------------------------------------------------------------------------------------------------------------------------- ---------------------------------------------------------------------------------------
In a single panel configuration, screen 2 refers to the second screen of the Split Screen Display Feature
where two different images (screen 1 and screen 2) can be displayed at the same time on one display. The
Screen 2 Display Start Address is the memory address corresponding to the first pixel of the second image
stored in display memory. To display screen 2 refer to AUX[0A] Screen 1 Display Line Count Register
(LSB) below.
.
Programming Notes and Examples
Issue Date: 98/10/08
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 5
Bit 4
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 13
Bit 12
(
)
=
)
×
(
ImageVerticalResolution
MemoryInterfaceWidth
×
----------------------------------------------------------------
2
8
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 3
Bit 2
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 11
Bit 10
)
×
(
BytesPerPixel
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 1
Bit 0
Screen 2
Screen 2
Display
Display
Start Addr
Start Addr
Bit 9
Bit 8
)
+
Screen1DisplayStartAddress
X16-BG-007-04
Page 23
SED1352

Advertisement

Table of Contents
loading

Table of Contents