Look-Up Table (Lut); Lut Registers - Epson SED1352 Technical Manual

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3.2 Look-Up Table (LUT)

This section provides a concise description of the LUT registers, followed by a description of a LUT. Next is a series of
examples which show how to initialize a LUT, create an inverted LUT, and how to select one of four banks in the 4 gray
shade mode.

3.2.1 LUT Registers

Note
Register bits discussed in this section are highlighted.
AUX[0E] Look-Up Table Address Register
I/O address = 1110b, Read/Write
Bank
Bank
Bit 1
Bit 0
The SED1352 has one internal 16 position, 4-bit wide Look-Up Table (palette). The 4-bit value programmed into each table
position determines the output gray shade of display data.
For example, in 16-level gray shade mode, a data value of 0001h (4 bits per pixel) will point to Look-Up Table positions
one and display the 4-bit gray shade that was previously programmed into that location.
bits 7-6
Bank Bits [1:0]
In 4-level gray mode (2-bits/pixel), the 16 position palette is arranged into four, 4 position "banks". These
two bits control which bank is currently selected. These bits have no effect in 16-level gray mode (4-
bits/pixel).
bits 3-0
Palette Address Bits [3:0]
These 4 bits provide a pointer into the 16 position Look-Up Table currently selected for CPU R/W access.
Note
The Look-Up Table configuration (e.g. 1/2/4 banks) does not affect the R/W access
from the CPU as all 16 positions can be accessed sequentially.
AUX[0F] Look-Up Table Data Register
I/O address = 1111b, Read/Write.
n/a
n/a
bits 3-0
Palette Data Bits [3:0]
These 4-bits are the gray shade values used for display data output. They are programmed into the 4-bit
Look-Up Table (palettes) positions pointed to by Palette Address bits [3:0].
For example; in a 16-level gray shade display mode, a data value of 0001b (4-bits / pixel) will point to
Look-Up Table position one and display the 4-bit gray shade corresponding to the value programmed into
that location.
SED1352
X16-BG-007-04
ID Bit
ID Bit
(Read Only)
(Read Only)
n/a
n/a
Epson Research and Development
Palette
Palette
Address
Address
Bit 3
Bit 2
Palette Data
Palette Data
Bit 3
Bit 2
Vancouver Design Center
Palette
Palette
Address
Address
Bit 1
Bit 0
Palette Data
Palette Data
Bit 1
Bit 0
Programming Notes and Examples
Issue Date: 98/10/08

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