Design Considerations - Quectel Smart LTE Module Series Hardware Design

CSI0 is used for rear camera, and CSI2 is used for front camera.
3.21.1.

3.21.1. Design Considerations


Special attention should be paid to the pin definition of LCM/camera connectors. Assure the SC650T
and the connectors are correctly connected.

MIPI are high speed signal lines, supporting maximum data rate up to 2.1Gbps. The differential
impedance should be controlled as 100Ω. Additionally, it is recommended to route the trace on the
inner layer of PCB, and do not cross it with other traces. For the same group of DSI or CSI signals, all
the MIPI traces should keep the same length. In order to avoid crosstalk, it is recommended to
maintain the intra-lane spacing as trace width and the inter-lane spacing as two times of the trace
width. Any cut or hole on GND reference plane under MIPI signals should be avoided.

It is recommended to select a low capacitance TVS for ESD protection and the recommended
parasitic capacitance is below 1pF.

Route MIPI traces according to the following rules:
a) The total trace length should not exceed 305mm;
b) Control the differential impedance as 85Ω±10%;
c) Control intra-lane length difference within 0.67mm;
d) Control inter-lane length difference within 1.3mm.
Table 23: MIPI Trace Length Inside the Module
Pin No. Pin Name
116 DSI0_CLK_N
115 DSI0_CLK_P
118 DSI0_LN0_N
117 DSI0_LN0_P
120 DSI0_LN1_N
119 DSI0_LN1_P
122 DSI0_LN2_N
121 DSI0_LN2_P
124 DSI0_LN3_N
123 DSI0_LN3_P
SC650T_Hardware_Design
Length (mm) Length Difference (P-N)
21.32
21.44
24.43
24.53
24.42
24.78
24.56
24.60
28.38
28.44
Smart LTE Module Series
SC650T Hardware Design
0.12
0.10
0.36
0.04
0.06
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