Reference Circuit Design For Headphone Interface; Reference Circuit Design For Loudspeaker Interface; Audio Interfaces Design Considerations - Quectel Smart LTE Module Series Hardware Design

3.23.3. Reference Circuit Design for Headphone Interface

MIC_BIAS2
AMIC2_M
AMIC2_P
HPH_L
HS_DET
HPH_R
HPH_REF
Figure 29: Reference Circuit Design for Headphone Interface

3.23.4. Reference Circuit Design for Loudspeaker Interface

LDO5_1P8
EARP
VPH_PWR
EA
RN
WSA_EN
PDM_CLK
PDM_DATA
GND
Module
Figure 30: Reference Circuit Design for Loudspeaker Interface

3.23.5. Audio Interfaces Design Considerations

It is recommended to use the electret microphone with dual built-in capacitors (e.g. 10pF and 33pF) for
filtering out RF interference, thus reducing TDD noise. The 33pF capacitor is applied for filtering out RF
interference when the module is transmitting at EGSM900. Without placing this capacitor, TDD noise
could be heard. The 10pF capacitor here is used for filtering out RF interference at DCS1800. Please note
SC650T_Hardware_Design
C2
C2
33pF
33pF
R2
R5
0R
NC
R7
C3 C4
680pF 680pF 0R
LDO5_1P8
VPH_PWR
WSA_EN
PDM_CLK
PDM_DATA
GND
WSA8810&WSA8815
Smart LTE Module Series
SC650T Hardware Design
C2
100pF
R4
F1
NC
1
5
F2
4
6
3
2
F3
F4
D1 D2 D3 D4 D5
ESD
EARP
EA
RN
F1
SPK_P
F2
SPK_N
C1
8.2pF
D1 D2
C2
8.2pF
12V 12V
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