Quectel Smart LTE Module Series Hardware Design page 51

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UART4_TXD
7
UART4_RXD
8
UART5_RXD
198
UART5_TXD
199
UART5_CTS
246
UART5_RTS
245
UART6_RXD
61
UART6_TXD
60
UART5 is a 4-wire UART interface with 1.8V power domain. A level translator chip should be used if
customers' application is equipped with a 3.3V UART interface. A level translator chip TXS0104EPWR
provided by Texas Instruments is recommended.
The following figure shows a reference design.
LDO5_1P8
C1
100 pF
UART 5_ CTS
UART 5_ RTS
UART5_ TXD
UART5_ RXD
Figure 13: Reference Circuit with Level Translator Chip (for UART5)
The following figure is an example of connection between SC650T and PC. A voltage level translator and
a RS-232 level translator chip are recommended to be added between the module and PC, as shown
below:
SC650T_Hardware_Design
DO
UART4 transmit data
DI
UART4 receive data
DI
UART5 receive data
DO
UART5 transmit data
DI
UART5 clear to send
DO
UART5 request to send
DI
UART6 receive data
DO
UART6 transmit data
VCCA
U1
OE
A1
A2
TXS0104 EPWR
A3
A4
Smart LTE Module Series
SC650T Hardware Design
VCCB
C2
100pF
GND
B1
B2
B3
B4
VDD _3.3V
CTS _3.3V
RTS _3.3V
TXD _3.3V
RXD _3.3V
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