Uart; Table 13-10. Jetson Agx Xavier Uart Pin Description - Nvidia Jetson AGX Xavier Series Design Manual

13.3

UART

Jetson AGX Xavier brings five UARTs out to the main connector. See Figure 13-7 for typical
assignments of the UARTs.
Table 13-10. Jetson AGX Xavier UART Pin Description
Pin # Module Pin Name SoC Signal
K54 UART1_RX UART1_RX
K53 UART1_TX UART1_TX
H54 UART1_CTS UART1_CTS
L51 UART1_RTS UART1_RTS
C56 UART2_RX UART2_RX
C58 UART2_TX UART2_TX
A57 UART2_CTS UART2_CTS
G58 UART2_RTS UART2_RTS
K60 UART3_RX_DEBUG UART3_RX
H62 UART3_TX_DEBUG UART3_TX
H58 UART5_RX UART5_RX
J58 UART5_TX UART5_TX
H57 UART5_CTS UART5_CTS
K58 UART5_RTS UART5_RTS
E61 SPI2_CLK (UART7_TX) SPI2_SCK
SPI2_CS0_N
D60 SPI2_CS0
(UART7_CTS)
SPI2_MISO
D62 SPI2_MISO
(UART7_RX)
SPI2_MOSI
F60 SPI2_MOSI
(UART7_RTS)
Notes:
1. In the Type/Dir column, Output is from Jetson AGX Xavier. Input is to Jetson AGX Xavier. Bidir is for Bidirectional signals.
2. The direction indicated for the UART pins is true when used for that function. Otherwise, these pins support GPIO functionality and can support
both input and output (bidirectional).
Jetson AGX Xavier Series Product
Usage/Description
UART 1 Receive
UART 1 Transmit
UART 1 Clear to Send
UART 1 Request to Send
UART 2 Receive
UART 2 Transmit
UART 2 Clear to Send
UART 2 Request to Send
Debug UART Receive
Debug UART Transmit
UART 5 Receive
UART 5 Transmit
UART 5 Clear to Send
UART 5 Request to Send
SPI 2 Clock or UART 7 Transmit
SPI 2 Chip Select 0 or UART 7 Clear to
Send
SPI 2 Master In / Slave Out or UART 7
Receive
SPI 2 Master Out / Slave In or UART 7
Return to Send
Miscellaneous Interfaces
Usage on NVIDIA
Direction
Carrier Board
Input
Output
Expansion Connector via
level shifter
Input
Output
Input
Output
Input
UART-USB (MicroB)
Bridge
Output
Input
Output
Input
Output
M.2 Key E Connector
Input
Output
Bidir
Bidir
PCIe x16 Connector
Bidir
Bidir
DG-09840-001_v2.5 | 110
Pin Type
CMOS – 1.8V