Nvidia Jetson AGX Xavier Series Design Manual page 90

Parameter
ESD (On-chip protection diode is able to withstand 2kV HMM. External ESD is optional. Designs should
include ESD footprint as a stuffing option)
Max junction capacitance (IO to GND)
Footprint
Location
Void
Series Resistor (R ) – Series resistor on P/N path for HDMI 2.0 (Mandatory)
S
Value
Location
Void
Connector
Connector Voiding
General
Routing over Voids
Noise Coupling
Notes:
1. The average of the differential signals is used for length matching.
2. Do not perform length matching within breakout region. Recommend doing trace length matching to <1ps before vias or any
discontinuity to minimize common mode conversion
3. If routing includes a flex or 2nd PCB, the max trace delay and skew calculations must include all the PCBs/flex routing.
Solutions with flex/2nd PCB may not achieve maximum frequency operation.
Jetson AGX Xavier Series Product
Requirement Units
0.35 pF
Pad right on the net instead of trace
stub
After pull-down resistor/CMC and
before RS
GND/PWR void under/above the cap
is needed. Void size = 1mm x 2mm
for 1 pair
≤ 6 Ω
After all components and before
HDMI connector
GND/PWR void under/above the RS
device is needed. Void size = SMT
area + 1x dielectric height keepout
distance.
Voiding the ground below the signal
lanes 0.1448(5.7mil) larger than the
pin itself
Routing over voids not allowed except void around device ball/pin the signal is
routed to.
Keep critical HDMI related traces including differential clock/data traces and
RSET trace away from other signal traces or unrelated power traces/areas or
power supply components
Notes
e.g. ON-semiconductor ESD8040
± 10%. 0ohm is acceptable if the design
passes the HDMI2.0 HF1-9 test. Otherwise,
adjust the RS value to ensure the HDMI2.0
tests pass: Eye diagram, Vlow test and HF1-
9 TDR test
DG-09840-001_v2.5 | 75
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