Darf64; Table 7: Darf64 Registers - Performance Computer PT-VME151A User Manual

4
Section FUNCTIONAL SUMMARY

DARF64

See "APPENDIX F: PT-VME151A Differences From VME131/141" on page 91 for in-depth discussion
of initialization issues. See APPENDIX G: and APPENDIX H: for more information.
70 Extensible Single Board Computer/Controller User's Manual
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Table 7: DARF64 Registers

ADDRESS NAME
18000000h DMALAR
18000004h DMAVAR
18000008h DMATC
1800000Ch DCSR
18000010h VMEBAR
18000014h RXDATA
18000018h RXADDR
1800001Ch RXCTL
18000020h BUSSEL
18000024h IVECT
18000028h APBR
1800002Ch TXDATA
18000030h TXADDR
18000034h TXCTRL
18000038h LMFIFO
1800003Ch MODE
18000040h SA64BAR
18000044h MA64MAR
18000048h LAG
1800004ch DMAVTC
FUNCTION
DMA Local Address Register
DMA VMEbus Address Register
DMA Transfer Count
Control and Status Register
VMEbus Slave Base Address Register
Receive FIFO Data bits output latch
Receive FIFO Address bits output latch
Receive FIFO Control bits output latch
VMEbus Select
VMEbus Interrupt Vector
Access Protect Boundary
Transmit FIFO Data bits output latch
Transmit FIFO Address bits output latch
Transmit FIFO Control bits output latch
Location Monitor FIFO read port
Mode Control
Slave A64 Base Address Register
Master A64 Base Address Register
Local Address Generator
DMA VMEbus Transfer Count
INIT
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