Initiating A Dma Transfer; Example - Performance Computer PT-VME151A User Manual

7
Section APPENDICES

Initiating a DMA Transfer

Step 1
Step 2
Step 3
Step 4
Step 5
Step 6
Step 7
Step 8
Step 9
Step 10 Wait for the DONE bit to become set which means that the DMA has completed.

Example:

To start a 2 Kbyte, D32 write DMA with discrete cycles from local address 20001000h to an A24
VME address of 90000000h, perform the following steps:
Step 1
Step 2
Step 3
Step 4
Step 5
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Make sure the system is not in BI-mode (refer to steps 7-9 of "Setting Up A24/A32 Slave
Images on the Bus" on page 102).
Set the DARFEN bit (located in the DARF Mode Control Register) to enable DARF64
functions.
Program the MBLT, BLT, BLT16 and DMARD bits (located in the DARF Mode Control
Register) according to the type of DMA to be performed (i.e. D16/32/64, discrete or block
transfers, reads or writes).
Load the beginning local address into DARF DMA Local Address Register.
Load the beginning VMEbus address into DARF DMA VMEbus Address Register. (Note:
the DMA24 bit of the DARF Mode Control Register will override whatever addressing
mode is implied by the VMEbus address being transferred to (A24:D16, etc.), and the
A24PO bit will have no effect on the DMA's transfers).
Load the transfer count into DARF DMA Transfer Count Register.
Make sure that transmit FIFO is in decoupled mode by clearing the TXATOM bit (located
in the DARF Mode Control Register).
Make sure that the LBERR, VBERR, DONE and DMAGO bits (located in the DARF
Control and Status Register) are cleared.
Set the DMAGO bit to begin the DMA operation.
NOTE: If an error occurs during the DMA, it will stop and either the DLBER or VBERR
bit will be set and the DONE bit will be cleared in the DARF Control and Status Register.
Exit BI-mode. Follow steps 7-9 of the section "Setting Up A24/A32 Slave Images on the
Bus" on page 102.
Set bit 31 of DARF Mode Control Register enabling DARF64 functions.
Clear the MBLT, BLT, and DMARD bits of DARF64 Mode Control Register. MBLT low
selects no D64 transfer, BLT low selects discrete VMEbus cycles and DMARD low selects
writes from the local to the VMEbus. DMAD16 is a don't care, no BLT transfers. (These
bits do not exist on a DARF32.)
Write 1000h to DARF DMA Local Address Register to load the local address 20001000h.
(The top 5 bits are unused.)
Write 90000000h to DARF DMA VMEbus Address Register to load a VME address of
90000000h.