Eeprom Usage; Ptbug - Performance Computer PT-VME151A User Manual

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Section APPENDICES
APPENDIX D: EEPROM Usage
PTI employs the Serial EEPROM to hold power-up and reset configuration information. The following
table shows the usage and initial values that will be found in the EEPROM as a result of running factory
testing of the PT-VME151A.
The table is divided into two groups, locations 00-43h are used by PTbug (however the information that
they contain will probably be necessary for any application) and locations 44h-63h are used by OS-9™
(when installed).

PTbug

The first four bytes of the EEPROM contains PTbug Magic Number. If the value is correct, PTbug
assumes that the rest of the locations that it uses are meaningful.
Byte locations 06h through 1Dh are used as initial values for the respective device registers.
The DARF64 requires that a reference to the location monitor be performed before it will respond as a
slave to shared memory accesses. Byte location 1Eh contains a flag that determines whether the PT-
VME151A will make this reference to itself (requiring that it accesses the VMEbus immediately after
reset) or allows an appropriate driver make the initial reference.
Byte locations 20h through 2Fh are reserved by PTI for future use.
After reset, PTbug can perform Power On Confidence tests then launch a user application. This boot
mechanism is defined in the PTbug User's Manual (811A0127xx) and uses locations 30h to 43h.
Two bytes (7Ch and 7Dh) are used by PTbug to store the ROM checksum. The Power On Confidence
test uses this information to validate ROM integrity.
The last two locations (7Eh-7Fh) in the EEPROM are used by the Power On Confidence test to exercise
the EEPROM read/write operation.
86 Extensible Single Board Computer/Controller User's Manual
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