Dma Mechanism; Interrupts; Termination - Performance Computer PT-VME151A User Manual

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Section FUNCTIONAL DESCRIPTION

DMA Mechanism

SCSI data phase bytes can be transferred with Direct Memory Access of the PT-VME151A. Under
program control the following steps must be performed to initiate a SCSI DMA transfer:
The SCSI Memory Address Register must be loaded with the source/destination address for the
transfer.
The System Control Register, SCSI DMA Read/Write Direction (SCDRD) bit is written to indicate
to the PT-VME151A control logic the direction of the transfer.
The FAS216 Transfer Count register is loaded with the desired size of the transfer (up to 64 KBytes).
Issue a data transfer command to the FAS216.
The hardware will handle the data transfer between the FAS216 and local DRAM.
Parity is generated and checked by PT-VME151A hardware on local DRAM accesses during SCSI
DMA. A level 7 interrrupt may be generated if a parity error is detected. See "Parity" on page 30 for more
information.

Interrupts

The 68040 can be notified of the completion of an operation of a change in state through the interrupt
mechanism provided on the FAS216 and ACC. The FAS216 Interrupt Register, in conjunction with the
FAS216 Status and FAS216 Sequence Step registers, are used to determine the source of an FAS216
interrupt.
For FAS216 interrupts to be forwarded to the 68040 the ACC the interrupt mechanism must be enabled
by setting the L3E bit in the ACC Local Interrupt Enable Register. The current state of this signal can be
read in the LI3 status bit of the ACC Local Interrupt Status Register. See the VMEbus Interface, ACC,
General Purpose Local Interrupts, I/O Event, FAS216 Requests section above for further information.
NOTE: The ACC General Purpose Local Interrupt input is driven by the FAS216 INT or the EPAK
EPIRQ signal!
A second interrupt mechanism exists that allows the detection of a RESET condition on the SCSIbus. A
Level 7 L7IMEM interrupt can be generated in the ACC. The interrupt is enabled by setting the MEMIS
bit in the ACC Level 7 Interrupt Status Register. The current state of this signal can be read in the MEMIP
status bit of the ACC Status Register 0. See VMEbus Interface, ACC, Interrupt Handler, Local Level 7
Sources section above.
See the FAS216 Technical Manual for more information on the Fast SCSI Processor Chip.

Termination

Fuse F1 (Littelfuse Part No. 273-001) provides short circuit protection for TERMPWR. To remove the
fuse, place the PT-VME151A on a work surface component side up with the VMEbus connectors closest
to the observer. Grip the clear body of fuse F1 and pull to the right. To replace the fuse reverse the
56 Extensible Single Board Computer/Controller User's Manual
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