Enable Interval Timer Interrupts; Enable Tick Timer Interrupts - Performance Computer PT-VME151A User Manual

Reset Interval Timer Interrupts
The RITI bits are encoded to reset the Request Latch of the individual Interval Timers. When
an Interval Timer reaches it's terminal count, the event is recorded by its Request Latch. The
outputs of the three Request Latches are OR'ed together, generating the Interval Timer Interrupt
Request to the 68040. The interrupt request from an individual Interval Timer remains active
until its Request Latch is reset using this field.
Value
3
2
1
0
RITI is a two bit field. It consists of register bits 3 and 4, where bit 3 is the least significant bit.
This field is always read as 0.

Enable Interval Timer Interrupts

All interrupt requests from the three Interval Timers can disabled. When the EITI bit in System
Control Register 2 is cleared (0) Interval Timer interrupt requests are disabled. When set (1)
they are enabled. Local Reset clears (0) this bit, disabling Interval Timer interrupts. EITI is
register bit 5.

Enable Tick Timer Interrupts

Interrupt requests from the ACC Tick Timer can disabled. When the ETTI bit in System Control
Register 2 is cleared (0) Tick Timer interrupt requests are disabled. When set (1) they are
enabled. Local Reset sets (1) this bit, enabling Tick Timer interrupts. ETTI is register bit 6.
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Function
Reset Interval Timer 2 Request Latch
Reset Interval Timer 1 Request Latch
Reset Interval Timer 0 Request Latch
No action
Extensible Single Board Computer/Controller User's Manual 49
Performance Computer