Xilinx Virtex-4 ML455 User Manual page 27

64-bit PCI Edge Connector
Table 3-11: P1 PCI Edge Connector Pinout (Continued)
The two PCI buses on the board schematics have signal names of the form EDGE_<signal
name> (denoting the card edge connector signals) and SKT_<signal name> (denoting the
signals wired to the top mounted PCI socket). The signal names listed in the A Side and B
Side columns of
The ML455 board supports both PCI and PCI-X applications. The edge connector
interfaces with the system board connector. Xilinx has both PCI and PCI-X LogiCORE
intellectual property cores available to facilitate getting started with application specific
design.
www.BDTIC.com/XILINX
Virtex-4 ML455 PCI/PCI-X Board
UG084 (v1.0) May 17, 2005
P1 A Side
A72 GND
A73 EDGE_AD56
A74 EDGE_AD54
A75 VCC3V3
A76 EDGE_AD52
A77 EDGE_AD50
A78 GND
A79 EDGE_AD48
A80 EDGE_AD46
A81 GND
A82 EDGE_AD44
A83 EDGE_AD42
A84 VCC3V3
A85 EDGE_AD40
A86 EDGE_AD38
A87 GND
A88 EDGE_AD36
A89 EDGE_AD34
A90 GND
A91 EDGE_AD32
A92 unused
A93 GND
A94 unused
Table 3-11
www.xilinx.com
Signal P1 B Side
B72
B73
B74
B75
B76
B77
B78
B79
B80
B81
B82
B83
B84
B85
B86
B87
B88
B89
B90
B91
B92
B93
B94
and Table 3-12 are standard PCI signal names.
R
Signal
EDGE_AD57
GND
EDGE_AD55
EDGE_AD53
GND
EDGE_AD51
EDGE_AD49
VCC3V3
EDGE_AD47
EDGE_AD45
GND
EDGE_AD43
EDGE_AD41
GND
EDGE_AD39
EDGE_AD37
VCC3V3
EDGE_AD35
EDGE_AD33
GND
unused
unused
GND
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