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R
Figure 3-2
bank, the number of I/Os used on the board per bank, and the provided function(s).
www.BDTIC.com/XILINX
12
shows a block diagram of the XC4VLX25FF668 banks, the number of I/Os per
BANK 6
64 I/Os, 64 used
V
= PCI_VCC = 3.0V
CCO
P1 PCI Edge Connector I/F
BANK 10
64 I/Os, 32 used
V
= PCI_VCC = 3.0V
CCO
P1 PCI Edge Connector I/F
BANK 8
64 I/Os, 64 used
V
= 2.5V
CCO
J4 DDR SODIMM
Socket I/F
Figure 3-2: Virtex-4 XC4VLX25FF668 Banking (Top View)
www.xilinx.com
Chapter 3: Hardware Description
BANK 3
16 I/Os, 4 used
V
= PCI_VCC = 3.0V
CCO
Clock I/Os
BANK 1
16 I/Os, 15 used
V
= 2.5V
CCO
XC2C32 CPLD I/F
BANK 0
V
= 2.5V
CCO
Configuration
BANK 2
16 I/Os, 12 used
V
= 2.5V
CCO
XCF32P Flash I/F
MAX3316 RS232 I/F
BANK 4
16 I/Os, 12 used
V
= 2.5V
CCO
User SW and LED I/F
133M, 200M Osc I/F
BANK 5
64 I/Os, 64 used
V
= SKT_VCCO = 3.0V
CCO
J1 PCI Socket I/F
BANK 9
64 I/Os, 50 used
V
= SKT_VCCO = 3.0V
CCO
J1 PCI Socket I/F
P11 Header I/F
BANK 7
64 I/Os, 64 used
V
= 2.5V
CCO
J4 DDR SODIMM
Socket I/F
UG084_c3_08_042605
Virtex-4 ML455 PCI/PCI-X Board
UG084 (v1.0) May 17, 2005
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