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QB-V850MINIL, QB-V850MINI Emulator
3.5
Designing Target System Circuits When Using V850E2, V850E1, or V850ES
To debug the target system with QB-V850MINIL or QB-V850MINI connected, a circuit to connect QB-V850MINIL or
QB-V850MINI is required on the target system.
This section presents information required for circuit design. Read this information together with the information
described in the user's manual of the target device.
Note that circuit design information when the target device is the V850E2S or V850E2M is described in 3.4 Designing
Target System Circuits When Using V850E2S or V850E2M.
3.5.1
Example of circuit design (for V850E2, V850E1, or V850ES)
Figure 3-11 illustrates an example of the design of a target system circuit that is used to connect QB-V850MINIL or
QB-V850MINI.
QB-V850MINIL/
QB-V850MINI
DRST#
RESET#
Signal Name
DCK
DMS
DDI
DDO
DRST#
FLMD0
RESET#
V
DD
GND
R20UT0221EJ0400 Rev.4.00
2013.08.30
V
DD
DCK
DMS
DDI
DDO
FLMD0
V
DD
VDD
GND
Figure 3-11. Circuit Connection Example
Clock for DCU
DCU state transition control signal
Data signal transmitted to DCU
Data signal transmitted from DCU
DCU reset signal
Flash programming mode setting signal
System reset input signal
Power supply (The power supply for buffers of a debugging interface, or for power supply
detection of a target system)
GND
Target device
DCK
DMS
DDI
DDO
DRST#
FLMD0
V
DD
RESET#
Outline of Signal
3. On-Chip Debugging
Page 38 of 86
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