Feature
FER
NFER
CER
CTO
SEFE
SENFE
SECE
PME SCI
Hot Plug
Advanced Error Reporting
PCIe Speed
Transmitter Half Swing
Detect Non-Compiance
Detect Timeout
Extra Bus Reserved
Reseved Memory
Prefetchable Memory
Reserved I/O
PCH PCIE LTR
Snoop Latency Ocerrid
Non Snoop Latency Ocerrid
62
Options
Description
PCI Express Device Fatal Error Reporting
Disabled
Enable/Disable.
Enable
PCI Express Device Non-Fatal Error Reporting
Disabled
Enable/Disable.
Enable
PCI Express Device Correctable Error Reporting
Disabled
Enable/Disable.
Enable
PCI Express Completion Timer TO Enable/Disable
Disabled
Enable
Root PCI Express System Error on Fatal Error
Disabled
Enable/Disable.
Enable
Root PCI Express System Error on Non-Fatal Error
Disabled
Enable/Disable.
Enable
Root PCI Express System Error on Correctable Error
Disabled
Enable/Disable.
Enable
Disabled
PCI Express PME SCI Enable/Disable.
Enable
PCI Express Hot Plug Enable/Disable.
Disabled
Enable
Disabled
Advanced Error Reporting Enable/Disale.
Enable
Configure PCIe Speed.
Auto
Gen1
Gen2
Gen3
Transmitter Half Swing Enable/Disable.
Disabled
Enabled
Detect Non-Compliance PCI Express Device. If
Disabled
enabled, it will take more time at POST time.
Enable
The number of milliseconds reference code will wait
0
for link to exit Detect state for enabled ports before
assuming there is no device and potentially disabling
the port.
Extra Bus Reserved (0-7) for bridges behind this Root
0
Bridge.
Reserved Memory Range for this Root Bridge.
10
Prefetchable Memory Range for this Root Bridge.
10
Reserved I/O (4K/8K/12K/16K/.../48K) Range for this
4
Root Bridge.
Disabled
PCH PCIE Latency Reporting Enable/Disable.
Enable
Disabled
Snoop Latency Override for PCH PCIE.
Manual
Disabled: Disable override.
Auto
Manual: Manually enter override values.
Auto (default): Maintain default BIOS flow."
Disabled
Non Snoop Latency Override for PCH PCIE.
Manual
Disabled: Disable override.Manual:
Manually enter override values.
Auto
Auto (default): Maintain default BIOS flow.
BIOS Setup
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